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DS92LV0412SQX PDF预览

DS92LV0412SQX

更新时间: 2024-02-06 20:11:27
品牌 Logo 应用领域
美国国家半导体 - NSC 线路驱动器或接收器驱动程序和接口接口集成电路
页数 文件大小 规格书
40页 943K
描述
5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

DS92LV0412SQX 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN, LCC48,.27SQ,20
Reach Compliance Code:compliantECCN代码:5A991.B.1
HTS代码:8542.39.00.01风险等级:5.11
差分输出:NO接口集成电路类型:LINE DRIVER
JESD-30 代码:S-PQCC-N48JESD-609代码:e3
长度:7 mm湿度敏感等级:3
功能数量:1端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装等效代码:LCC48,.27SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:1.8,3.3 V认证状态:Not Qualified
最大接收延迟:接收器位数:1
座面最大高度:0.8 mm子类别:Line Driver or Receivers
最大压摆率:95 mA标称供电电压:1.8 V
电源电压1-最大:1.89 V电源电压1-分钟:1.71 V
电源电压1-Nom:1.8 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mmBase Number Matches:1

DS92LV0412SQX 数据手册

 浏览型号DS92LV0412SQX的Datasheet PDF文件第1页浏览型号DS92LV0412SQX的Datasheet PDF文件第2页浏览型号DS92LV0412SQX的Datasheet PDF文件第4页浏览型号DS92LV0412SQX的Datasheet PDF文件第5页浏览型号DS92LV0412SQX的Datasheet PDF文件第6页浏览型号DS92LV0412SQX的Datasheet PDF文件第7页 
DS92LV0411 Pin Diagram  
30125219  
DS92LV0411 — Top View  
DS92LV0411 Pin Descriptions  
Pin Name  
Pin #  
I/O, Type Description  
Channel Link Parallel Input Interface  
RxIN[3:0]+ 2, 33, 31, 29  
I, LVDS  
I, LVDS  
I, LVDS  
I, LVDS  
True LVDS Data Input  
This pair should have a 100 termination for standard LVDS levels.  
Inverting LVDS Data Input  
RxIN[3:0]- 1, 34, 32, 30,  
28  
This pair should have a 100 termination for standard LVDS levels.  
True LVDS Clock Input  
RxCLKIN+  
35  
This pair should have a 100 termination for standard LVDS levels.  
Inverting LVDS Clock Input  
RxCLKIN-  
34  
This pair should have a 100 termination for standard LVDS levels.  
Control and Configuration  
PDB 23  
I, LVCMOS Power-down Mode Input  
w/ pull-down PDB = 1, Device is enabled (normal operation).  
Refer to ”Power Up Requirements and PDB Pin” in the Applications Information Section.  
PDB = 0, Device is powered down  
When the Device is in the power-down state, the driver outputs (DOUT+/-) are both logic  
high, the PLL is shutdown, IDD is minimized. Control Registers are RESET.  
3
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