Datasheet > DS92LV0422SQE

DS92LV0422SQE

更新时间： 2024-01-25 08:13:58

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
40页	946K
描述
10 - 75 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

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DS92LV0422SQE 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
包装说明：	QCCN, LCC48,.27SQ,20	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.41	接口集成电路类型：	LINE RECEIVER
JESD-30 代码：	S-XQCC-N48	JESD-609代码：	e3
湿度敏感等级：	3	端子数量：	48
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	QCCN
封装等效代码：	LCC48,.27SQ,20	封装形状：	SQUARE
封装形式：	CHIP CARRIER	峰值回流温度（摄氏度）：	260
电源：	1.8,3.3 V	认证状态：	Not Qualified
最大接收延迟：		子类别：	Line Driver or Receivers
最大压摆率：	100 mA	表面贴装：	YES
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
Base Number Matches：	1

DS92LV0422SQE 数据手册

PRELIMINARY

May 26, 2010

DS92LV0421 / DS92LV0422

10 - 75 MHz Channel Link II Serializer/Deserializer with

LVDS Parallel Interface

General Description

Features

5-channel (4 data + 1 clock) Channel Link LVDS parallel

■

The DS92LV0421 (serializer) and DS92LV0422 (deserializer)

chipset translates a Channel Link LVDS video interface (4

LVDS Data + LVDS Clock) into a high-speed serialized inter-

face over a single CML pair.

interface supports 24-bit data 3-bit control at 10 – 75 MHz

AC Coupled STP Interconnect up to 10 meters in length

■

Integrated serial CML terminations

The DS92LV0421 and DS92LV0422 enable applications that

currently use the popular Channel Link or Channel Link style

devices to seamlessly upgrade to an embedded clock inter-

face to reduce interconnect cost or ease design challenges.

The parallel LVDS interface also reduces FPGA I/O pins,

board trace count and alleviates EMI issues, when compared

to traditional single-ended wide bus interfaces.

AT–SPEED BIST Mode and status pin

Optional I2C compatible Serial Control Bus

Power Down Mode minimizes power dissipation

1.8V or 3.3V compatible control pin interface

>8 kV ESD (HBM) protection

-40° to +85°C temperature range

Programmable transmit de-emphasis, receive equalization,

on-chip scrambling and DC balancing enables longer dis-

tance transmission over lossy cables and backplanes. The

Deserializer automatically locks to incoming data without an

external reference clock or special sync patterns, providing

easy “plug-and-go” operation.

SERIALIZER – DS92LV0421

Data scrambler for reduced EMI

■

DC–balance encoder for AC coupling

Selectable output VOD and adjustable de-emphasis

DESERIALIZER – DS92LV0422

The DS92LV0421 and DS92LV0422 are programmable

though an I2C interface as well as by pins. A built-in AT-

SPEED BIST feature validates link integrity and may be used

for system diagnostics.

Random data lock; no reference clock required

■

Adjustable input receiver equalization

EMI minimization on output parallel bus (Spread Spectrum

Clock Generation and LVDS VOD select)

The DS92LV0421 and DS92LV0422 can be used inter-

changeably with the DS92LV2421 or DS92LV2422. This al-

lows designers the flexibility to connect to the host device and

receiving devices with different interface types, LVDS or LVC-

MOS.

Applications

Embedded Video and Display

■

Machine Vision, Industrial Imaging, Medical Imaging

Office Automation — Printers, Scanners, Copiers

Security and Video Surveillance

General purpose data communication

■

Applications Diagram

30120927

TRI-STATE® is a registered trademark of National Semiconductor Corporation.

301209

www.national.com

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与DS92LV0422SQE相关器件

型号	品牌	描述	获取价格	数据表
DS92LV0422SQE/NOPB	TI	具有 LVDS 并行接口的 10 - 75MHz Channel Link II 解串器	获取价格
DS92LV0422SQX	NSC	10 - 75 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface	获取价格
DS92LV0422SQX/NOPB	TI	具有 LVDS 并行接口的 10 - 75MHz Channel Link II 解串器	获取价格
DS92LV090A	NSC	9 Channel Bus LVDS Transceiver	获取价格
DS92LV090A	TI	9 通道总线 LVDS 收发器	获取价格
DS92LV090A_07	NSC	9 Channel Bus LVDS Transceiver	获取价格

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