September 2007
DS90C241/DS90C124
5-35MHz DC-Balanced 24-Bit LVDS Serializer and
Deserializer
General Description
The DS90C241/DS90C124 Chipset translates a 24-bit paral-
lel bus into a fully transparent data/control LVDS serial stream
with embedded clock information. This single serial stream
simplifies transferring a 24-bit bus over PCB traces and cable
by eliminating the skew problems between parallel data and
clock paths. It saves system cost by narrowing data paths that
in turn reduce PCB layers, cable width, and connector size
and pins.
User selectable clock edge for parallel data on both
Transmitter and Receiver
Internal DC Balancing encode/decode – Supports AC-
coupling interface with no external coding required
Individual power-down controls for both Transmitter and
Receiver
Embedded clock CDR (clock and data recovery) on
Receiver and no external source of reference clock
needed
All codes RDL (random data lock) to support live-
pluggable applications
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The DS90C241/DS90C124 incorporates LVDS signaling on
the high-speed I/O. LVDS provides a low power and low noise
environment for reliably transferring data over a serial trans-
mission path. By optimizing the serializer output edge rate for
the operating frequency range EMI is further reduced.
LOCK output flag to ensure data integrity at Receiver side
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Balanced TSETUP/THOLD between RCLK and RDATA on
Receiver side
PTO (progressive turn-on) LVCMOS outputs to reduce
EMI and minimize SSO effects
All LVCMOS inputs and control pins have internal
pulldown
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In addition the device features pre-emphasis to boost signals
over longer distances using lossy cables. Internal DC bal-
anced encoding/decoding is used to support AC-Coupled
interconnects.
On-chip filters for PLLs on Transmitter and Receiver
Temperature range –40°C to +105°C
Greater than 8 kV HBM ESD tolerant
Meets AEC-Q100 compliance
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Features
5 MHz–35 MHz clock embedded and DC-Balancing 24:1
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and 1:24 data transmissions
User defined Pre-Emphasis driving ability through external
resistor on LVDS outputs and capable to drive up to 10
meters shielded twisted-pair cable
Power supply range 3.3V ± 10%
48-pin TQFP package
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Block Diagram
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