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DS8908B

更新时间: 2024-11-01 21:55:43
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美国国家半导体 - NSC /
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11页 197K
描述
DS8908B AM/FM Digital Phase-Locked Loop Frequency Synthesizer

DS8908B 数据手册

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June 1990  
DS8908B AM/FM Digital Phase-Locked  
Loop Frequency Synthesizer  
General Description  
The DS8908B is a PLL synthesizer designed specifically for  
use in AM/FM radios. It contains the reference oscillator, a  
phase comparator, a charge pump, an operational amplifier,  
current if the VCO frequency is low. The low noise opera-  
tional amplifier provided has a high impedance JFET input  
and a large output voltage range. The op amp’s negative  
input is common with the charge pump output and its posi-  
tive input is internally biased.  
2
a 120 MHz ECL/I L dual modulus programmable divider,  
and a 19-bit shift register/latch for serial data entry. The  
device is designed to operate with a serial data controller  
generating the necesary division codes for each frequency,  
and logic state information for radio function inputs/outputs.  
Features  
Y
Uses inexpensive 3.96 MHz reference crystal  
A 3.96 MHz pierce oscillator and divider chain generate a  
1.98 MHz external controller clock, a 20 kHz, 10 kHz, 9 kHz,  
and a 1 kHz reference signals, and a 50 Hz time-of-day  
signal. The oscillator and divider chain are sourced by the  
Y
F
capability greater than 120 MHz allows direct syn-  
thesis at FM frequencies  
IN  
Y
FM resolution of either 10 kHz or 20 kHz allows usage  
of 10.7 MHz ceramic filter distribution  
V
CCM  
pin thus providing a low power controller clock drive  
Y
Y
Serial data entry for simplified control  
and time-of-day indication when the balance of the PLL is  
powered down.  
50 Hz output for time-of-day reference driven from sep-  
arate low power V  
CCM  
The 21-bit serial data steram is transferred between the fre-  
quency synthesizer and the controller via a 3-wire bus sys-  
tem comprised of a data line, a clock line, and an enable  
line.  
Y
Y
Y
Y
2 open collector buffered outputs for controlling various  
radio functions or loop gain  
Separate AM and FM inputs; AM input has 15 mV (typi-  
cal) hysteresis  
The first 2 bits in the serial data stream address the synthe-  
sizer thus permitting other devices such as display drivers to  
share the same bus. The next 14 bits are used for the  
Programmable charge pump current sources enable ad-  
justment of system loop gain  
Operational amplifier provides high impedance load to  
charge pump output and a wide voltage range for the  
VCO input  
a
PLL(N 1) divide code. The 15th bit is used internally to  
select the AM or FM local oscillator input. A high level on  
this bit enables the FM input and a low level enables the AM  
input. The 16th and 17th bits are used to select one of the 4  
reference frequencies. The 18th and 19th bits are connect-  
ed via latches to open collector outputs. These outputs can  
be used to drive radio functions such as gain, mute, AM,  
FM, or charge pump current source levels.  
Connection Diagram  
Dual-In-Line Package  
2
The PLL consists of a 14-bit programmable I L divider, an  
a
ECL phase comparator, an ECL dual modulus (p/p 1) pre-  
scaler, a high speed charge pump, and an operational am-  
a
plifier. The programmable divider divides by (N 1), N being  
the number loaded into the shift register. The programmable  
d
divider is clocked through a -/8 prescaler by the AM input  
or through a $*/64 prescaler by the FM input. The AM input  
d
will work at frequencies up to 15 MHz, while the FM input  
works up to 120 MHz. The VCO can be tuned with a fre-  
quency resolution of either 1 kHz, 9 kHz, 10 kHz, or 20 kHz.  
The buffered AM and FM inputs are self-biased and can be  
driven directly by the VCO through a capacitor. The ECL  
phase comparator produces very accurate resolution of the  
phase difference between the input signal and the reference  
oscillator. The high speed charge pump consists of  
a
switchable constant current source and sink. The charge  
pump can be programmed to deliver from 75 mA to 750 mA  
of constant current by connection of an external resistor  
from pin R  
to ground or the open collector bit out-  
PROGRAM  
puts. Connection of programming resistors to the bit outputs  
enables the controller to adjust the loop gain for the particu-  
lar reference frequency selected. The charge pump will  
source current if the VCO frequency is high and sink  
TL/F/5111–1  
Top View  
Order Number DS8908BN  
See NS Package Number N20A  
TRI-STATEÉ is a registered trademark of National Semiconductor Corp.  
C
1995 National Semiconductor Corporation  
TL/F/5111  
RRD-B30M105/Printed in U. S. A.  

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