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DS50EV401 PDF预览

DS50EV401

更新时间： 2024-09-19 02:58:35
品牌 Logo 应用领域
德州仪器 - TI 驱动接口集成电路驱动器
页数 文件大小 规格书
19页 2255K
描述
DS50EV401 2.5 Gbps / 5.0 Gbps or 8.0 Gbps Quad Cable and Backplane Equalizer

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中文翻译

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DS50EV401 技术参数

生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN,针数：48
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.66
其他特性：ALSO OPERATE WITH 3V SUPPLY差分输出：NO
驱动器位数：1输入特性：STANDARD
接口集成电路类型：LINE TRANSCEIVER接口标准：GENERAL PURPOSE
JESD-30 代码：S-XQCC-N48长度：7 mm
功能数量：4端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
认证状态：Not Qualified接收器位数：1
座面最大高度：0.8 mm最大供电电压：2.625 V
最小供电电压：2.375 V标称供电电压：2.5 V
表面贴装：YES温度等级：INDUSTRIAL
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD宽度：7 mm
Base Number Matches：1

DS50EV401 数据手册

 浏览型号DS50EV401的Datasheet PDF文件第2页浏览型号DS50EV401的Datasheet PDF文件第3页浏览型号DS50EV401的Datasheet PDF文件第4页浏览型号DS50EV401的Datasheet PDF文件第5页浏览型号DS50EV401的Datasheet PDF文件第6页浏览型号DS50EV401的Datasheet PDF文件第7页 
DS50EV401  
www.ti.com  
SNLS288E –JANUARY 2008–REVISED MARCH 2013  
DS50EV401 2.5 Gbps / 5.0 Gbps or 8.0 Gbps Quad Cable and Backplane Equalizer  
Check for Samples: DS50EV401  
1
FEATURES  
DESCRIPTION  
The DS50EV401 is a low power, programmable  
equalizer specifically designed to reduce inter-symbol  
interference (ISI) induced by a variety of interconnect  
media. In all modes, the equalizer can operate, error  
free, with an input eye that is completely closed by  
interconnect ISI. The MODE control, allows the user  
to select between equalization settings for 8.0 Gbps  
operation or 2.5 Gbps / 5.0 Gbps operation.  
2
•
Automatic power management on an  
individual lane basis  
•
•
Data rate optimized equalization  
Operates over 7 meter of 24 AWG Twin-ax  
Cables up to 8 Gbps  
•
•
•
•
•
•
•
•
•
Typical residual deterministic jitter:  
0.18 UI @ 8 Gbps w/ 30” of FR4  
The DS50EV401 uses Current-mode logic (CML) on  
both input and output ports, which provide constant  
50 ohm single-ended impedance to AC ground.  
Differential signaling is implemented through out the  
entire signal path to minimize supply induced jitter.  
The DS50EV401 is available in a 7mm x 7mm 48-pin  
leadless WQFN package, and is powered from a  
single power supply of either 3.3 or 2.5V.  
0.18 UI @ 5 Gbps w/ 40” of FR4  
0.16 UI @ 2.5 Gbps w/ 40” of FR4  
8 kV HBM ESD protection  
-40 to 85°C operating temperature range  
7 mm x 7 mm 48-pin leadless WQFN package  
Single power supply of either 3.3V or 2.5V  
Low power (typically 95 mW per channel at  
2.5V VDD  
)
Application Diagram  
EQ  
CHANNEL - LOSS  
1/4 DS50EV401  
SerDes  
ASIC/FPGA  
Switch  
Device  
EQ  
CHANNEL - LOSS  
1/4 DS50EV401  
BACKPLANE  
or CABLE  
LINE CARD(S)  
SWITCH CARD  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008–2013, Texas Instruments Incorporated  
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DS50EV401_15 TI

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DS50EV401SQX NSC

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 		IC QUAD LINE TRANSCEIVER, QCC48, 7 X 7 MM, LLP-48, Line Driver or Receiver
DS50EV401SQX/NOPB TI

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DS50PCI401 NSC

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 		2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Transceiver with Equalization and De-Emphasis
DS50PCI401 TI

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 		具有均衡和去加重功能的 5.0Gbps 4 通道转接驱动器
DS50PCI401SQ NSC

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 		2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Transceiver with Equalization and De-Emphasis
DS50PCI401SQ/NOPB NSC

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 		IC QUAD LINE TRANSCEIVER, QCC54, 10 X 5.50 MM, LEAD FREE, LLP-54, Line Driver or Receiver
DS50PCI401SQ/NOPB TI

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 		具有均衡和去加重功能的 5.0Gbps 4 通道转接驱动器 | NJY | 54 | -1

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