Datasheet > DS36C280

DS36C280

更新时间： 2024-11-10 02:58:51

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德州仪器 - TI		/
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14页	321K
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DS36C280 Slew Rate Controlled CMOS EIA-RS-485 Transceiver

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DS36C280 数据手册

DS36C280

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SNLS097C –JULY 2000–REVISED FEBRUARY 2013

DS36C280 Slew Rate Controlled CMOS EIA-RS-485 Transceiver

Check for Samples: DS36C280

FEATURES

DESCRIPTION

The DS36C280 is a low power differential bus/line

transceiver designed to meet the requirements of RS-

485 Standard for multipoint data transmission. In

addition, it is compatible with TIA/EIA-422-B.

•

100% RS-485 Compliant

Guaranteed RS-485 Device Interoperation

–

•

Low Power CMOS Design: I_CC500 μA max

Adjustable Slew Rate Control

The slew rate control feature allows the user to set

the driver rise and fall times by using an external

resistor. Controlled edge rates can reduce switching

EMI.

–

Minimizes EMI Effects

•

Built-In Power Up/Down Glitch-Free Circuitry

–

Permits Live Transceiver

Insertion/Displacement

The CMOS design offers significant power savings

over its bipolar and ALS counterparts without

sacrificing ruggedness against ESD damage. The

device is ideal for use in battery powered or power

conscious applications. I_CCis specified at 500 μA

maximum.

•

SOIC Packages

Industrial Temperature Range: −40°C to

+85°C

•

On-board Thermal Shutdown Circuitry

–

Prevents Damage to the Device in the Event

of Excessive Power Dissipation

The driver and receiver outputs feature TRI-STATE

capability. The driver outputs operate over the entire

common mode range of −7V to +12V. Bus contention

or fault situations are handled by a thermal shutdown

circuit, which forces the driver outputs into the high

impedance state.

•

Wide Common Mode Range: −7V to +12V

(1)

Receiver Open Input Fail-safe

¼ unit load (DS36C280): ≥128 nodes

½ unit load (DS36C280T): ≥64 nodes

ESD (human body model): ≥2 kV

The receiver incorporates a fail safe circuit which

guarantees a high output state when the inputs are

(1)

left open

(1) Non-terminated, Open Inputs only

Connection and Logic Diagram

Figure 1. See Package Number D (R-PDSO-G8)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...14

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与DS36C280相关器件

型号	品牌	获取价格	描述	数据表
DS36C280_00	NSC	获取价格	Slew Rate Controlled CMOS EIA-RS-485 Transceiver
DS36C280_14	TI	获取价格	DS36C280 Slew Rate Controlled CMOS EIA-RS-485 Transceiver
DS36C280M	NSC	获取价格	Slew Rate Controlled CMOS EIA-RS-485 Transceiver
DS36C280M/NOPB	TI	获取价格	Slew Rate Controlled CMOS TIA/EIA-485 Transceiver 8-SOIC 0 to 70
DS36C280MX	TI	获取价格	LINE TRANSCEIVER, PDSO8, 0.150 INCH, SOIC-8
DS36C280MX/NOPB	NSC	获取价格	IC LINE TRANSCEIVER, PDSO8, 0.150 INCH, PLASTIC, SOIC-8, Line Driver or Receiver
DS36C280MX/NOPB	TI	获取价格	DS36C280 Slew Rate Controlled CMOS EIA-RS-485 Transceiver
DS36C280N	NSC	获取价格	Slew Rate Controlled CMOS EIA-RS-485 Transceiver
DS36C280TM	TI	获取价格	LINE TRANSCEIVER, PDSO8, 0.150 INCH, SOIC-8
DS36C280TM	NSC	获取价格	Slew Rate Controlled CMOS EIA-RS-485 Transceiver

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