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DS36C280TM PDF预览

DS36C280TM

更新时间: 2024-11-18 22:49:07
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
10页 172K
描述
Slew Rate Controlled CMOS EIA-RS-485 Transceiver

DS36C280TM 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:0.150 INCH, SOIC-8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.11差分输出:YES
驱动器位数:1高电平输入电流最大值:0.000002 A
输入特性:DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型:LINE TRANSCEIVER
接口标准:EIA-422-B; TIA-422-B; EIA-485JESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:4.9 mm
湿度敏感等级:1功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C最小输出摆幅:1.5 V
最大输出低电流:0.004 A输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):235
电源:5 V认证状态:Not Qualified
最大接收延迟:400 ns接收器位数:1
座面最大高度:1.75 mm子类别:Line Driver or Receivers
最大压摆率:0.9 mA最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
最大传输延迟:1000 ns宽度:3.9 mm
Base Number Matches:1

DS36C280TM 数据手册

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July 1998  
DS36C280  
Slew Rate Controlled CMOS EIA-RS-485 Transceiver  
General Description  
Features  
n 100% RS-485 compliant  
The DS36C280 is a low power differential bus/line trans-  
ceiver designed to meet the requirements of RS-485 Stan-  
dard for multipoint data transmission. In addition, it is com-  
patible with TIA/EIA-422-B.  
— Guaranteed RS-485 device interoperation  
n Low power CMOS design: ICC 500 µA max  
n Adjustable slew rate control  
— Minimizes EMI affects  
n Built-in power up/down glitch-free circuitry  
— Permits live transceiver insertion/displacement  
The slew rate control feature allows the user to set the driver  
rise and fall times by using an external resistor. Controlled  
edge rates can reduce switching EMI.  
n DIP and SOIC packages available  
The CMOS design offers significant power savings over its  
bipolar and ALS counterparts without sacrificing ruggedness  
against ESD damage. The device is ideal for use in battery  
powered or power conscious applications. ICC is specified at  
500 µA maximum.  
n Industrial temperature range: −40˚C to +85˚C  
n On-board thermal shutdown circuitry  
— Prevents damage to the device in the event of  
excessive power dissipation  
The driver and receiver outputs feature TRI-STATE® capabil-  
ity. The driver outputs operate over the entire common mode  
range of −7V to +12V. Bus contention or fault situations are  
handled by a thermal shutdown circuit, which forces the  
driver outputs into the high impedance state.  
n Wide common mode range: −7V to +12V  
n Receiver open input fail-safe (Note 1)  
1
n
n
4
unit load (DS36C280): 128 nodes  
unit load (DS36C280T): 64 nodes  
1
2
n ESD (human body model): 2 kV  
The receiver incorporates a fail safe circuit which guarantees  
a high output state when the inputs are left open (Note 1) .  
Connection and Logic Diagram  
Truth Table  
DRIVER SECTION  
DE/RE*  
DI  
H
L
DO/RI  
DO*/RI*  
H
H
L
H
L
L
H
Z
X
Z
RECEIVER SECTION  
DE/RE*  
RI-RI*  
RO  
H
L
L
+0.2V  
−0.2V  
X
L
H
Z
L
OPEN (Note 1)  
H
DS012052-1  
Note 1: Non-terminated, Open Inputs only  
Order Number DS36C280TM, DS36C280TN  
DS36C280M and DS36C280N  
See NS Package Number M08A or N08E  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 1999 National Semiconductor Corporation  
DS012052  
www.national.com  

DS36C280TM 替代型号

型号 品牌 替代类型 描述 数据表
DS36C280TM/NOPB TI

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