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DS34C86MWC PDF预览

DS34C86MWC

更新时间: 2024-11-27 13:07:27
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DS34C86MWC 数据手册

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DS34C86T  
www.ti.com  
SNLS379C MAY 1998REVISED APRIL 2013  
DS34C86T Quad CMOS Differential Line Receiver  
Check for Samples: DS34C86T  
1
FEATURES  
DESCRIPTION  
The DS34C86T is a quad differential line receiver  
designed to meet the RS-422, RS-423, and Federal  
Standards 1020 and 1030 for balanced and  
unbalanced digital data transmission, while retaining  
the low power characteristics of CMOS.  
2
CMOS Design for Low Power  
±0.2V Sensitivity Over the Input Common  
Mode Voltage Range  
Typical Propagation Delays: 19 ns  
Typical Input Hysteresis: 60 mV  
Inputs Won't Load Line when VCC = 0V  
The DS34C86T has an input sensitivity of 200 mV  
over the common mode input voltage range of ±7V.  
Hysteresis is provided to improve noise margin and  
discourage output instability for slowly changing input  
waveforms.  
Meets the Requirements of EIA Standard RS-  
422  
TRI-STATE Outputs for System Bus  
Compatibility  
The DS34C86T features internal pull-up and pull-  
down resistors which prevent output oscillation on  
unused channels.  
Available in Surface Mount  
Open Input Failsafe Feature, Output High for  
Open Input  
Separate enable pins allow independent control of  
receiver pairs. The TRI-STATE outputs have 6 mA  
source and sink capability. The DS34C86T is pin  
compatible with the DS3486.  
Logic Diagram  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1998–2013, Texas Instruments Incorporated  

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