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DS34C86TN PDF预览

DS34C86TN

更新时间: 2024-01-01 05:37:19
品牌 Logo 应用领域
美国国家半导体 - NSC 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
8页 199K
描述
Quad CMOS Differential Line Receiver

DS34C86TN 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP-16Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.52Is Samacsys:N
输入特性:DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型:LINE RECEIVER
接口标准:EIA-422; EIA-423; FED STD 1020; FED STD 1030JESD-30 代码:R-PDIP-T16
JESD-609代码:e0长度:19.305 mm
湿度敏感等级:1功能数量:4
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
最大输出低电流:0.006 A输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
最大接收延迟:30 ns接收器位数:4
座面最大高度:5.08 mm子类别:Line Driver or Receivers
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:7.62 mm
Base Number Matches:1

DS34C86TN 数据手册

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May 1998  
DS34C86T  
Quad CMOS Differential Line Receiver  
General Description  
Features  
n CMOS design for low power  
The DS34C86T is a quad differential line receiver designed  
to meet the RS-422, RS-423, and Federal Standards 1020  
and 1030 for balanced and unbalanced digital data transmis-  
sion, while retaining the low power characteristics of CMOS.  
±
n
0.2V sensitivity over the input common mode voltage  
range  
n Typical propagation delays: 19 ns  
n Typical input hysteresis: 60 mV  
The DS34C86T has an input sensitivity of 200 mV over the  
±
common mode input voltage range of 7V. Hysteresis is pro-  
=
n Inputs won’t load line when VCC 0V  
vided to improve noise margin and discourage output insta-  
bility for slowly changing input waveforms.  
n Meets the requirements of EIA standard RS-422  
n TRI-STATE outputs for system bus compatibility  
n Available in surface mount  
The DS34C86T features internal pull-up and pull-down resis-  
tors which prevent output oscillation on unused channels.  
n Open input Failsafe feature, output high for open input  
Separate enable pins allow independent control of receiver  
pairs. The TRI-STATE® outputs have 6 mA source and sink  
capability. The DS34C86T is pin compatible with the  
DS3486.  
Logic Diagram  
DS008699-1  
Connection Diagram  
Truth Table  
Enable  
Input  
X
Output  
Dual-In-Line Package  
L
Z
H
L
H
VID VTH (Max)  
VID VTH (Min)  
H
*
H
Open  
H
*
Open, not terminated  
=
Z
TRI-STATE  
DS008699-2  
Top View  
Order Number DS34C86TM, and DS34C86TN  
See NS Package Number M16A and N16E  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 1998 National Semiconductor Corporation  
DS008699  
www.national.com  

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