DS3166/DS3168/DS31612
12.12.2 Receive Side PLCP Register Map..................................................................................................... 315
12.13 FIFO REGISTERS........................................................................................................................................ 323
12.13.1 Transmit FIFO Register Map.............................................................................................................. 323
12.13.2 Receive FIFO Register Map............................................................................................................... 327
12.14 CELL/PACKET PROCESSOR.......................................................................................................................... 329
12.14.1 Transmit Cell Processor Register Map .............................................................................................. 329
12.14.2 Receive Cell Processor...................................................................................................................... 337
12.14.3 Transmit Packet Processor Register Map ......................................................................................... 347
12.14.4 Receive Packet Processor Register Map .......................................................................................... 352
13 JTAG INFORMATION
361
13.1 JTAG DESCRIPTION.................................................................................................................................... 361
13.2 JTAG TAP CONTROLLER STATE MACHINE DESCRIPTION ............................................................................. 362
13.3 JTAG INSTRUCTION REGISTER AND INSTRUCTIONS ...................................................................................... 364
13.4 JTAG ID CODES......................................................................................................................................... 365
13.5 JTAG FUNCTIONAL TIMING.......................................................................................................................... 366
13.6 IO PINS ...................................................................................................................................................... 366
14 PIN ASSIGNMENT
367
371
372
373
376
15 PACKAGE MECHANICAL DIMENSIONS
16 PACKAGE THERMAL INFORMATION
17 DC ELECTRICAL CHARACTERISTICS
18 AC TIMING CHARACTERISTICS
18.1 FRACTIONAL PORT AC CHARACTERISTICS.................................................................................................... 378
18.2 LINE INTERFACE AC CHARACTERISTICS ....................................................................................................... 378
18.3 MISC PIN AC CHARACTERISTICS.................................................................................................................. 379
18.4 OVERHEAD PORT AC CHARACTERISTICS...................................................................................................... 379
18.5 SYSTEM INTERFACE AC CHARACTERISTICS.................................................................................................. 380
18.6 MICRO INTERFACE AC CHARACTERISTICS.................................................................................................... 382
18.7 JTAG INTERFACE AC CHARACTERISTICS..................................................................................................... 385
19 REVISION HISTORY
386
7