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DS3170N+T&R PDF预览

DS3170N+T&R

更新时间: 2024-02-21 20:08:52
品牌 Logo 应用领域
美信 - MAXIM 电信电信集成电路
页数 文件大小 规格书
230页 2223K
描述
Framer

DS3170N+T&R 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:ObsoleteReach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.81
峰值回流温度(摄氏度):NOT SPECIFIED电信集成电路类型:FRAMER
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

DS3170N+T&R 数据手册

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PRODUCT BRIEF  
19-5785; Rev 2; 3/11  
DS3170  
DS3/E3 Single-Chip Transceiver  
GENERAL DESCRIPTION  
FEATURES  
.
.
Single-Chip Transceiver for DS3 and E3  
The DS3170 combines a DS3/E3 framer and an LIU  
(single-chip transceiver) to interface to a DS3/E3  
physical copper line.  
Performs Receive Clock/Data Recovery and  
Transmit Waveshaping for DS3 and E3  
.
.
Jitter Attenuator can be Placed Either in the  
Receive or Transmit Path  
APPLICATIONS  
Access Concentrators Multiservice Access  
Interfaces to 75Coaxial Cable at Lengths Up to  
380 Meters or 1246 Feet (DS3), or 440 Meters or  
1443 Feet (E3)  
Platforms (MSAPs)  
Routers and Switches  
SONET/SDH ADM  
SONET/SDH Muxes  
Multiservice Protocol  
Platform (MSPPs)  
.
.
Uses 1:2 Transformers on Both Tx and Rx  
On-Chip DS3 (M23 or C-Bit) and E3 (G.751 or  
G.832) Framer  
PBXs  
Test Equipment  
PDH Multiplexer/  
Demultiplexer  
Digital Cross Connect  
.
Built-In HDLC Controller with 256-Byte FIFO for  
the Insertion/Extraction of DS3 PMDL, G.751 Sn  
Bit, and G.832 NR/GC Bytes  
Integrated-Access Device  
(IAD)  
.
.
.
.
On-Chip BERT for PRBS and Repetitive Pattern  
Generation, Detection and Analysis  
ORDERING INFORMATION  
Large Performance-Monitoring Counters for  
Accumulation Intervals of At Least 1 Second  
PART  
TEMP RANGE PIN-PACKAGE  
DS3170  
0°C to +70°C  
0°C to +70°C  
-40°C to +85°C 100 CSBGA  
-40°C to +85°C 100 CSBGA  
100 CSBGA  
100 CSBGA  
Flexible Overhead Insertion/Extraction Port for  
DS3, E3 Framers  
DS3170+  
DS3170N  
DS3170N+  
Loopbacks Include Line, Diagnostic, Framer,  
Payload, and Analog with Capabilities to Insert  
AIS in the Directions Away from Loopback  
Directions  
+Denotes a lead(Pb)-free/RoHS compliant package.  
.
Integrated Clock Rate Adapter to Generate the  
Remaining Internally Required 44.736MHz (DS3)  
and 34.368MHz (E3) from a Single-Clock  
Reference Source  
FUNCTIONAL DIAGRAM  
.
.
.
.
CLAD Reference Clock can be 44.736MHz,  
34.368MHz, 77.76MHz, 51.84MHz, or 19.44MHz  
Software Compatible with DS3171–DS3174 SCT  
Product Family  
DS3/  
E3  
LIU  
DS3/E3  
FRAMER/  
FORMATTER  
SYSTEM  
BACKPLANE  
DS3/E3 LINE  
8-/16-Bit Parallel and Slave SPI Serial ( ≤ 10Mbps)  
Microprocessor Interface  
DS3170  
Low-Power (0.5W) 3.3V Operation (5V Tolerant  
I/O)  
.
.
.
100-Pin Small 11mm x 11mm (1mm) CSBGA  
Industrial Temperature Operation: -40°C to +85°C  
IEEE 1149.1 JTAG Test Port  
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device  
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.  
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