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DS17285S-5/T&R PDF预览

DS17285S-5/T&R

更新时间: 2024-01-14 05:30:02
品牌 Logo 应用领域
美信 - MAXIM 时钟
页数 文件大小 规格书
30页 320K
描述
Real Time Clock, Volatile, 1 Timer(s), CMOS, PDSO24, 0.300 INCH, SOP-24

DS17285S-5/T&R 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:SO-24针数:24
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:10 weeks
风险等级:5.1Is Samacsys:N
最大时钟频率:0.032 MHz外部数据总线宽度:8
信息访问方法:PARALLEL, MUXED BUS中断能力:Y
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:17.9 mm湿度敏感等级:1
端子数量:24计时器数量:1
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:5 V认证状态:Not Qualified
座面最大高度:2.68 mm子类别:Timer or RTC
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
最短时间:SECONDS处于峰值回流温度下的最长时间:NOT SPECIFIED
易失性:YES宽度:7.5 mm
uPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCKBase Number Matches:1

DS17285S-5/T&R 数据手册

 浏览型号DS17285S-5/T&R的Datasheet PDF文件第4页浏览型号DS17285S-5/T&R的Datasheet PDF文件第5页浏览型号DS17285S-5/T&R的Datasheet PDF文件第6页浏览型号DS17285S-5/T&R的Datasheet PDF文件第8页浏览型号DS17285S-5/T&R的Datasheet PDF文件第9页浏览型号DS17285S-5/T&R的Datasheet PDF文件第10页 
Real-Time Clocks  
Typical Operating Characteristics  
(V  
= +3.3V, T = +25°C, unless otherwise noted.)  
A
CC  
SUPPLY CURRENT  
vs. INPUT VOLTAGE  
OSCILLATOR FREQUENCY  
vs. SUPPLY VOLTAGE  
SUPPLY CURRENT  
vs. TEMPERATURE  
400  
32768.7  
32768.6  
32768.5  
32768.4  
32768.3  
32768.2  
32768.1  
32768.0  
400  
350  
300  
250  
V
= 0V  
CC  
V
= 3.0V  
BAT  
350  
300  
250  
200  
2.5  
2.8  
3.0  
3.3  
(V)  
3.5  
3.8  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
-40 -25 -10  
5
20 35 50 65 80  
V
SUPPLY VOLTAGE (V)  
BAT  
TEMPERATURE (°C)  
Pin Description  
PIN  
NAME  
FUNCTION  
24  
28  
Active-Low Power-On Reset. This open-drain output pin is intended for use as an on/off control  
for the system power. With V voltage removed from the device, PWR can be automatically  
CC  
activated from a kickstart input by the KS pin or from a wake-up interrupt. Once the system is  
powered on, the state of PWR can be controlled by bits in the control registers. The PWR pin  
can be connected through a pullup resistor to a positive supply. For 5V operation, the voltage  
of the pullup supply should be no greater than 5.7V. For 3V operation, the voltage on the  
pullup supply should be no greater than 3.9V.  
1
8
PWR  
Connections for Standard 32.768kHz Quartz Crystal. The internal oscillator circuitry is  
designed for operation with a crystal having a specified load capacitance (C ) of 6pF or  
L
2, 3  
9, 10  
X1, X2  
12.5pF. Pin X1 is the input to the oscillator and can optionally be connected to an external  
32.768kHz oscillator. The output of the internal oscillator, pin X2, is floated if an external  
oscillator is connected to pin X1. These pins are missing (N.C.) on the EDIP package.  
Multiplexed Bidirectional Address/Data Bus. The addresses are presented during the first  
portion of the bus cycle and latched into the device by the falling edge of ALE. Write data is  
AD0–AD7 latched by the rising edge of WR. In a read cycle, the device outputs data during the latter  
portion of the RD low. The read cycle is terminated and the bus returns to a high-impedance  
state as RD transitions high.  
12–17,  
19, 20  
4–11  
12, 16  
21, 22, 26  
GND  
Ground  
_____________________________________________________________________  
7

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