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DRV8701_15

更新时间： 2024-09-20 01:01:27
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42页 1761K
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DRV8701 Brushed DC Motor Full-Bridge Gate Driver

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DRV8701_15 数据手册

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Sample &  
Buy  
Support &  
Community  
Product  
Folder  
Tools &  
Software  
Technical  
Documents  
DRV8701  
SLVSCX5B –MARCH 2015–REVISED JULY 2015  
DRV8701 Brushed DC Motor Full-Bridge Gate Driver  
1 Features  
2 Applications  
1
•
Single H-Bridge Gate Driver  
•
•
•
•
•
•
Industrial Brushed-DC Motors  
Robotics  
–
–
Drives Four External N-Channel MOSFETs  
Supports 100% PWM Duty Cycle  
Home Automation  
Industrial Pumps and Valves  
Power Tools  
•
•
5.9-V to 45-V Operating Supply Voltage Range  
Two Control Interface Options  
Handheld Vacuum Cleaners  
–
–
PH/EN (DRV8701E)  
PWM (DRV8701P)  
3 Description  
The DRV8701 is a single H-bridge gate driver that  
uses four external N-channel MOSFETs targeted to  
drive a 12-V to 24-V bidirectional brushed DC motor.  
•
Adjustable Gate Drive (5 Levels)  
–
–
6-mA to 150-mA Source Current  
12.5-mA to 300-mA Sink Current  
•
•
•
Supports 1.8-V, 3.3-V, and 5-V Logic Inputs  
Current Shunt Amplifier (20 V/V)  
A
PH/EN (DRV8701E) or PWM (DRV8701P)  
interface allows simple interfacing to controller  
circuits. An internal sense amplifier allows for  
adjustable current control. The gate driver includes  
circuitry to regulate the winding current using fixed  
off-time PWM current chopping.  
Integrated PWM Current Regulation  
–
Limits Motor Inrush Current  
•
•
Low-Power Sleep Mode (9 μA)  
Two LDO Voltage Regulators to Power External  
Components  
DRV8701 drives both high- and low-side FETs with  
9.5-V VGS gate drive. The gate drive current for all  
external FETs is configurable with a single external  
resistor on the IDRIVE pin.  
–
–
AVDD: 4.8 V, up to 30-mA Output Load  
DVDD: 3.3 V, up to 30-mA Output Load  
A low-power sleep mode is provided which shuts  
down internal circuitry to achieve very-low quiescent  
current draw. This sleep mode can be set by taking  
the nSLEEP pin low.  
•
•
Small Package and Footprint  
–
–
24-Pin VQFN (PowerPAD™)  
4.0 × 4.0 × 0.9 mm  
Protection Features:  
Internal  
undervoltage  
overcurrent  
protection  
functions  
charge  
are  
pump  
provided:  
faults,  
–
–
–
–
–
–
VM Undervoltage Lockout (UVLO)  
Charge Pump Undervoltage (CPUV)  
Overcurrent Protection (OCP)  
Pre-Driver Fault (PDF)  
lockout,  
shutdown,  
short-circuit  
protection,  
predriver faults, and overtemperature. Fault  
conditions are indicated on the nFAULT pin.  
Device Information(1)  
Thermal Shutdown (TSD)  
PART NUMBER  
PACKAGE  
BODY SIZE (NOM)  
Fault Condition Output (nFAULT)  
DRV8701  
VQFN (24)  
4.00 × 4.00 x 0.90 mm  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
SPACE  
Gate-Drive Current  
tDRIVE  
Simplified System Block Diagram  
IHOLD  
High-side  
gate drive  
5.9V to 45 V  
IHOLD  
IHOLD  
current  
DRV8701  
High-side  
VGS  
PH/EN or PWM  
nSLEEP  
Gate  
drive  
FETs  
M
H-Bridge Gate  
Driver  
tDRIVE  
VREF  
Controller  
IHOLD  
IHOLD  
Low-side  
gate drive  
current  
sense  
sense output  
nFAULT  
Shunt Amp  
Protection  
LDO  
IHOLD  
Low-side  
VGS  
3.3 & 4.8 V  
30 mA  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 
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