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DPA424R-TL PDF预览

DPA424R-TL

更新时间: 2024-09-16 22:29:47
品牌 Logo 应用领域
帕沃英蒂格盛 - POWERINT 转换器开关
页数 文件大小 规格书
36页 289K
描述
Highly Integrated DC-DC Converter ICs for Distributed Power Architectures

DPA424R-TL 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:D2PAK
包装说明:TO-263, SMSIP6/7H,.6,50针数:4
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:14 weeks
风险等级:1.61模拟集成电路 - 其他类型:SWITCHING REGULATOR
控制模式:VOLTAGE-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:75 V最小输入电压:16 V
标称输入电压:35 VJESD-30 代码:R-PSSO-G6
JESD-609代码:e0长度:10.29 mm
湿度敏感等级:4功能数量:1
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C最大输出电流:3.5 A
封装主体材料:PLASTIC/EPOXY封装代码:TO-263
封装等效代码:SMSIP6/7H,.6,50封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):225
认证状态:Not Qualified座面最大高度:4.95 mm
子类别:Switching Regulator or Controllers表面贴装:YES
切换器配置:SINGLE最大切换频率:425 kHz
技术:CMOS温度等级:AUTOMOTIVE
端子面层:TIN LEAD端子形式:GULL WING
端子节距:1.27 mm端子位置:SINGLE
处于峰值回流温度下的最长时间:30宽度:8.405 mm
Base Number Matches:1

DPA424R-TL 数据手册

 浏览型号DPA424R-TL的Datasheet PDF文件第2页浏览型号DPA424R-TL的Datasheet PDF文件第3页浏览型号DPA424R-TL的Datasheet PDF文件第4页浏览型号DPA424R-TL的Datasheet PDF文件第5页浏览型号DPA424R-TL的Datasheet PDF文件第6页浏览型号DPA424R-TL的Datasheet PDF文件第7页 
DPA423-426  
DPA-Switch Family  
Highly Integrated DC-DC Converter ICs  
for Distributed Power Architectures  
Product Highlights  
V
O
Highly Integrated Solution  
• Eliminates 20-50 external components–saves space, cost  
• Integrates 220 V high frequency MOSFET, PWM control  
• Lower cost plastic DIP surface mount (G package) and  
SENSE  
CIRCUIT  
DPA-Switch  
V
IN  
D
L
through-hole (P package) options for designs 35 W  
CONTROL  
RESET/  
CLAMP  
CIRCUIT  
C
Superior Performance and Flexibility  
• Eliminates all external current sensing circuitry  
• Built-inauto-restartforoutputoverload/openloopprotection  
• Pin selectable 300/400 kHz fixed frequency  
S
X
F
PI-2770-032002  
• Wide input (line) voltage range: 16-75 VDC  
• Source connected tab reduces EMI  
Figure 1. Typical Forward Converter Application.  
• Line under-voltage (UV) detection: meets ETSI standards  
• Line overvoltage (OV) shutdown protection  
• Low cost synchronous rectification: line UV/OV shut down  
limits gate drive voltage range from transformer winding  
• Fully integrated soft-start for minimum stress/overshoot  
• Externally programmable current limit  
• Supports forward or flyback topology  
• Cycle skipping: regulation to zero load without pre-load  
• Hysteretic thermal shutdown for automatic fault recovery  
OUTPUT POWER TABLE  
36-75 VDC INPUT RANGE (FORWARD)2,4  
Total Device  
Max  
0.5 W 1 W 2.5 W 4 W 6 W Power  
Output1  
Dissipation3  
PRODUCT4  
DPA423  
12 W 16 W  
-
-
-
-
-
-
18 W  
35 W  
70 W  
16 W 23 W 35 W  
DPA424  
EcoSmart®- Energy Efficient  
• Extremely low consumption at no load  
DPA425  
23 W 32 W 50 W 62 W  
25 W 35 W 55 W 70 W 83 W 100 W  
36-75 VDC INPUT RANGE (FLYBACK)2  
DPA426  
• Cycle skipping at light load for high standby efficiency  
Total Device3  
Max  
1.5 W Power  
Output1  
Applications  
Dissipation  
PRODUCT4  
DPA423  
0.5 W 0.75 W 1 W  
• Telco central office equipment: xDSL, ISDN, PABX, etc.  
• Distributed power architectures (24 V/48 V bus, etc.)  
• Digital feature phones, VoIP phones, PoE  
• Industrial controls (24 V/48 V)  
9 W  
13 W  
-
-
13 W  
10 W 14.5 W 18 W 24 W 26 W  
DPA424  
5
5
5
DPA425  
-
-
-
25.5 W 52 W  
Description  
Table 1. Notes: 1. Maximum output power is limited by device internal  
current limit. 2. See Applications Considerations section for complete  
description of assumptions and for output powers with other input voltage  
ranges. 3. For device dissipation of 1.5 W or below, use Por G packages.  
Device dissipation above 1.5 W is possible only with R package. 4. See  
Part Ordering Information. 5. Due to higher switching losses, the DPA425  
may not deliver additional power compared to a smaller device.  
The DPA-Switch IC family introduces a highly integrated  
solution for DC-DC conversion applications in the 16-75 VDC  
input range.  
DPA-Switch uses the same proven topology as TOPSwitch, cost  
effectively integrating the high voltage power MOSFET, PWM  
control, fault protection and other control circuitry onto a single  
CMOS chip. High performance features are enabled with three  
user configurable pins.  
The following transparent or built-in features are also provided:  
soft-start, cycle skipping down to zero load and hysteretic  
thermal shutdown. In addition, all critical parameters (i.e.  
current limit, frequency, PWM gain) have tight temperature  
and absolute tolerance, to simplify design and optimize system  
cost.  
January 2004  

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