DP83241BV

更新时间： 2024-01-05 14:39:16

品牌	Logo	应用领域
美国国家半导体 - NSC		电信集成电路电信电路信息通信管理时钟
页数	文件大小	规格书
20页	251K
描述
CDD Device (FDDI Clock Distribution Device)

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DP83241BV 技术参数

February 1991

DP83241 CDD^TMDevice

(FDDI Clock Distribution Device)

General Description

Features

Provides 12.5 MHz and 25 MHz TTL clocks

The CDD device is a clock generation and distribution de-

vice intended for use in FDDI (Fiber Distributed Data Inter-

face) networks. The device provides the complete set of

clocks required to convert byte wide data to serial format for

fiber medium transmission and to move byte wide data be-

tween the PLAYER^TMand BMAC^TMdevices in various sta-

tion configurations. 12.5 MHz and 125 MHz differential ECL

clocks are generated for the conversion of data to serial

format and 12.5 MHz and 25 MHz TTL clocks are generated

for the byte wide data transfers.

12.5 MHz and 125 MHz ECL clocks

5 phase TTL local byte clocks eliminate clock

skew problems in concentrators

Internal VCO requires no varactors, coils or

adjustments

Option for use of High Q external VCO

125 MHz clock generated from a 12.5 MHz crystal

External PLL synchronizing reference for

concentrator configurations

28-pin PLCC package

BiCMOS processing

TL/F/10385–1

FIGURE 1-1. FDDI Chip Set Block Diagram

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

BMAC^TM, BSI^TM, CDD^TM, CRD^TMand PLAYER^TMare trademarks of National Semiconductor Corporation.

1995 National Semiconductor Corporation

TL/F/10385

RRD-B30M105/Printed in U. S. A.

12 3 4 5 6 7...20

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