DM74LS11

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DM74LS11 数据手册

August 1986

Revised March 2000

DM74LS11

Triple 3-Input AND Gate

General Description

This device contains three independent gates each of

which performs the logic AND function.

Ordering Code:

Order Number Package Number

Package Description

DM74LS11M

DM74LS11N

M14A

N14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Y = ABC

Inputs

Output

H = HIGH Logic Level

L = LOW Logic Level

X = Either LOW or HIGH Logic Level

DS006350

www.fairchildsemi.com

12 3 4

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型号	品牌	获取价格	描述	数据表
DM74LS112A	FAIRCHILD	获取价格	Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complement
DM74LS112A	NSC	获取价格	DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENT
DM74LS112AM	NSC	获取价格	DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENT
DM74LS112AMX	FAIRCHILD	获取价格	J-K-Type Flip-Flop
DM74LS112AN	FAIRCHILD	获取价格	Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complement
DM74LS112AN	NSC	获取价格	DUAL NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS WITH PRESET, CLEAR, AND COMPLEMENT
DM74LS112AN/A+	ETC	获取价格	J-K-Type Flip-Flop
DM74LS112AN/B+	ETC	获取价格	J-K-Type Flip-Flop
DM74LS112N	TI	获取价格	IC,FLIP-FLOP,DUAL,J/K TYPE,LS-TTL,DIP,16PIN,PLASTIC
DM74LS112N/A+	ETC	获取价格	J-K-Type Flip-Flop