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DM74AS573

更新时间: 2024-11-14 22:39:15
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
6页 62K
描述
Octal D-Type Transparent Latch with 3-STATE Outputs

DM74AS573 数据手册

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October 1986  
Revised March 2000  
DM74AS573  
Octal D-Type Transparent Latch with 3-STATE Outputs  
General Description  
Features  
These 8-bit registers feature totem-pole 3-STATE outputs  
designed specifically for driving highly-capacitive or rela-  
tively low-impedance loads. The high-impedance state and  
increased HIGH-logic-level drive provide these registers  
with the capability of being connected directly to and driv-  
ing the bus lines in a bus-organized system without need  
for interface or pull-up components. They are particularly  
attractive for implementing buffer registers, I/O ports, bidi-  
rectional bus drivers, and working registers.  
Switching specifications at 50 pF  
Switching specifications guaranteed over full tempera-  
ture and VCC range  
Advanced oxide-isolated, ion-implanted Schottky TTL  
process  
Functionally equivalent with DM74S373  
Improved AC performance over DM74S373 at approxi-  
mately half the power  
The eight latches of the DM74AS573 are transparent D-  
type latches, meaning that while the enable (G) is HIGH  
the Q outputs will follow the data (D) inputs. When the  
enable is taken LOW the output will be latched at the level  
of the data that was set UP.  
3-STATE buffer-type outputs drive bus lines directly  
Bus structured pinout  
A buffered output control input can be used to place the  
eight outputs in either a normal logic state (HIGH or LOW  
logic levels) or a high-impedance state. In the high-imped-  
ance state the outputs neither load nor drive the bus lines  
significantly.  
The output control does not affect the internal operation of  
the latches. That is, the old data can be retained or new  
data can be entered even while the outputs are OFF.  
The pin-out is arranged to ease printed circuit board layout.  
All data inputs are on one side of the package while all the  
outputs are on the other side.  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74AS573WM  
DM74AS573N  
M20B  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
© 2000 Fairchild Semiconductor Corporation  
DS006313  
www.fairchildsemi.com  

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