DM74AS574

更新时间： 2024-11-14 22:39:15

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		触发器
页数	文件大小	规格书
6页	63K
描述
Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

DM74AS574 数据手册

October 1986

Revised March 2000

DM74AS574

Octal D-Type Edge-Triggered Flip-Flops

with 3-STATE Outputs

General Description

Features

■ Switching specifications at 50 pF

These 8-bit registers feature totem-pole 3-STATE outputs

designed specifically for driving highly-capacitive or rela-

tively low-impedance loads. The high-impedance state and

increased HIGH-logic-level drive provide these registers

with the capability of being connected directly to and driv-

ing the bus lines in a bus-organized system without need

for interface or pull-up components. They are particularly

attractive for implementing buffer registers, I/O ports, bidi-

rectional bus drivers, and working registers.

■ Switching specifications guaranteed over full tempera-

ture and V_CCrange

■ Advanced oxide-isolated, ion-implanted Schottky TTL

process

■ Functionally equivalent with DM74S374

■ Improved AC performance over DM74S374 at approxi-

mately half the power

The eight flip-flops of the DM74AS574 are edge-triggered

D-type flip-flops. On the positive transition of the clock, the

Q outputs will be set to the logic states that were set up at

the D inputs.

■ 3-STATE buffer-type outputs drive bus lines directly

■ Bus structured pinout

A buffered output control input can be used to place the

eight outputs in either a normal logic state (HIGH or LOW

logic levels) or a high impedance state. In the high-imped-

ance state the outputs neither load nor drive the bus lines

significantly.

The output control does not affect the internal operation of

the flip-flops. That is, the old data can be retained or new

data can be entered even while the outputs are OFF.

The pinout is arranged to ease printed circuit board layout.

All data inputs are on one side of the package while all the

outputs are on the other side.

Ordering Code:

Order Number Package Number

Package Description

DM74AS574WM

DM74AS574N

M20B

N20A

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

DS006314

www.fairchildsemi.com

12 3 4 5 6

中文翻译

下载PDF

与DM74AS574相关器件

型号	品牌	获取价格	描述	数据表
DM74AS574J	NSC	获取价格	IC,FLIP-FLOP,OCTAL,D TYPE,AS-TTL,DIP,20PIN,CERAMIC
DM74AS574J/A+	NSC	获取价格	IC,FLIP-FLOP,OCTAL,D TYPE,AS-TTL,DIP,20PIN,CERAMIC
DM74AS574N	FAIRCHILD	获取价格	Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs
DM74AS574N	TI	获取价格	暂无描述
DM74AS574N/A+	ETC	获取价格	Octal D-Type Flip-Flop
DM74AS574N/B+	NSC	获取价格	IC,FLIP-FLOP,OCTAL,D TYPE,AS-TTL,DIP,20PIN,PLASTIC
DM74AS574WM	TI	获取价格	AS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, 0.300 INCH, PLASTIC, SOIC-20
DM74AS574WM	FAIRCHILD	获取价格	Octal D-Type Edge-Triggered Flip-Flops with 3-STATE Outputs
DM74AS574WMX	FAIRCHILD	获取价格	Octal D-Type Flip-Flop
DM74AS574WMX	TI	获取价格	AS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, 0.300 INCH, PLASTIC, SOIC-20

与DM74AS574相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

6
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

3
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

29
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

12

产品中心

服务支持

精选活动

关于我们

帮助中心

DM74AS574

DM74AS574 数据手册

与DM74AS574相关器件

与DM74AS574相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

DM74AS574

DM74AS574 数据手册

与DM74AS574相关器件

与DM74AS574相关文章

您还可以找

您在本页遇到什么问题？