DG4051E, DG4052E, DG4053E
www.vishay.com
Vishay Siliconix
Low Capacitance, Low Charge Injection, 4- / 8-Channel,
Triple SPDT, 5 ꢀ / 12 ꢀ / 5 ꢀ / 3 ꢀ ꢁnalog ꢂMltipleꢃerꢄ
DESCRIPTION
FEATURES
The DG4051E, DG4052E, and DG4053E are high precision
CMOS analog multiplexers. The DG4051E is an 8-channel
multiplexer, the DG4052E is a dual 4-channel multiplexer,
and the DG4053E is a triple 2-channel multiplexer or triple
SPDT.
• 3 V to 16 V single supply or 3 to 8 V dual
supply operation
• Low parasitic capacitance:
C
C
D(ON): 8.5 pF / typ. (DG4053E)
S(OFF): 2.0 pF / typ. (DG4053E)
The DG4051E, DG4052E, and DG4053E feature low
leakage, parasitic capacitance, and low charge injection
of 0.3 pC over the full voltage range. These devices are ideal
for high precision signal switching and multiplexing.
• Less than 0.3 pC charge injection over the full signal swing
range
• Low leakage: < 50 pA, typ.
• Fast switching tON: 35 ns, typ.
• 3 V logic compatible for control
• Bi-directional rail to rail signal switching
Designed to operate from a 3 V to 16 V single supply or from
a
3 V to 8 V dual supplies, the DG4051E, DG4052E, and
DG4053E are fully specified at 3 V, 5 V, 12 V and 5 V. All
control logic inputs have guaranteed 2 V logic high limit
when operating from 5 V or 5 V supplies and 1.4 V when
operating from a 3 V supply.
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
All switches conduct equally well in both directions, offering
rail to rail analog signal switching and can be used both as
multiplexers as well as de-multiplexers.
APPLICATIONS
• Automatic test equipment
• Process control and automation
• Data acquisition systems
• Meters and instruments
• Medical and healthcare systems
• Communication systems
• Audio and video signal routing
• Relay replacement
The DG4051E, DG4052E, and DG4053E operating
temperature is specified from -40 °C to +125 °C and
are available in 16 pin TSSOP and the ultra compact
1.8 mm x 2.6 mm miniQFN16 packages.
BENEFITS
• Wide operation voltage range
• Low charge injection
• Low parasitic capacitance
• Compact package option
• Battery powered systems
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG4053E
DG4051E
DG4052E
TSSOP16
TSSOP16
TSSOP16
1
2
3
4
5
6
X4
X6
X
Y0
Y2
1
2
3
4
5
6
1
16
15
14
13
12
11
10
9
V+
X2
16
15
14
V+
Y
16
15
14
13
12
11
V+
X2
X1
Y1
Y0
2
3
X1
X
Y
Z1
Z
X
X7
X5
Y3
4
5
6
7
13
12
X0
X3
X1
Y1
X0
X3
Z0
X0
A
ENABLE
V-
ENABLE
V-
ENABLE
ENABLE
A
B
C
11
10
9
V-
Logic
7
8
7
8
Logic
B
C
10
9
A
B
GND
GND
GND
8
Top View
Top View
Top View
ENABLE = LO, all switches are controlled by addr pins.
ENABLE = HI, all switches are off.
S16-0623-Rev. A, 11-Apr-16
Document Number: 69685
1
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000