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DG202CJ PDF预览

DG202CJ

更新时间: 2024-01-18 11:14:58
品牌 Logo 应用领域
英特矽尔 - INTERSIL 开关光电二极管输出元件
页数 文件大小 规格书
7页 74K
描述
Quad SPST, CMOS Analog Switches

DG202CJ 技术参数

生命周期:Transferred包装说明:CERAMIC, DIP
Reach Compliance Code:unknown风险等级:5.56
模拟集成电路 - 其他类型:SPSTJESD-30 代码:R-CDIP-T
信道数量:4功能数量:1
最大通态电阻 (Ron):175 Ω封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified最大供电电压 (Vsup):44 V
表面贴装:NO最长接通时间:600 ns
端子形式:THROUGH-HOLE端子位置:DUAL
Base Number Matches:1

DG202CJ 数据手册

 浏览型号DG202CJ的Datasheet PDF文件第1页浏览型号DG202CJ的Datasheet PDF文件第2页浏览型号DG202CJ的Datasheet PDF文件第3页浏览型号DG202CJ的Datasheet PDF文件第4页浏览型号DG202CJ的Datasheet PDF文件第5页浏览型号DG202CJ的Datasheet PDF文件第7页 
DG201A, DG202  
Ceramic Dual-In-Line Frit Seal Packages (CERDIP)  
c1 LEAD FINISH  
F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A)  
16 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE  
-D-  
E
-A-  
INCHES MILLIMETERS  
MIN  
BASE  
(c)  
METAL  
SYMBOL  
MAX  
0.200  
0.026  
0.023  
0.065  
0.045  
0.018  
0.015  
0.840  
0.310  
MIN  
-
MAX  
5.08  
0.66  
0.58  
1.65  
1.14  
0.46  
0.38  
21.34  
7.87  
NOTES  
b1  
A
b
-
-
M
M
(b)  
0.014  
0.014  
0.045  
0.023  
0.008  
0.008  
-
0.36  
0.36  
1.14  
0.58  
0.20  
0.20  
-
2
-B-  
b1  
b2  
b3  
c
3
SECTION A-A  
bbb  
C A - B  
D
D
S
S
S
-
4
BASE  
PLANE  
Q
2
A
-C-  
SEATING  
PLANE  
c1  
D
3
L
α
5
S1  
b2  
eA  
A A  
e
E
0.220  
5.59  
5
b
C A - B  
eA/2  
aaa M C A - B S D S  
c
e
0.100 BSC  
2.54 BSC  
-
eA  
eA/2  
L
0.300 BSC  
0.150 BSC  
7.62 BSC  
3.81 BSC  
-
ccc  
D
S
M
S
-
NOTES:  
0.125  
0.200  
0.060  
-
3.18  
5.08  
1.52  
-
-
1. Index area: A notch or a pin one identification mark shall be locat-  
ed adjacent to pin one and shall be located within the shaded  
area shown. The manufacturer’s identification shall not be used  
as a pin one identification mark.  
Q
0.015  
0.005  
0.38  
0.13  
6
S1  
7
o
o
o
o
90  
105  
90  
105  
-
α
2. The maximum limits of lead dimensions b and c or M shall be  
measured at the centroid of the finished lead surfaces, when  
solder dip or tin plate lead finish is applied.  
aaa  
bbb  
ccc  
M
-
-
-
-
0.015  
0.030  
0.010  
0.0015  
-
-
-
-
0.38  
0.76  
0.25  
0.038  
-
-
3. Dimensions b1 and c1 apply to lead base metal only. Dimension  
M applies to lead plating and finish thickness.  
-
2, 3  
8
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a  
partial lead paddle. For this configuration dimension b3 replaces  
dimension b2.  
N
16  
16  
Rev. 0 4/94  
5. This dimension allows for off-center lid, meniscus, and glass  
overrun.  
6. Dimension Q shall be measured from the seating plane to the  
base plane.  
7. Measure dimension S1 at all four corners.  
8. N is the maximum number of terminal positions.  
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.  
10. Controlling dimension: INCH.  
4-6  

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