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DDTA114YLP-7 PDF预览

DDTA114YLP-7

更新时间： 2024-11-13 10:01:39
品牌 Logo 应用领域
美台 - DIODES 晶体晶体管
页数 文件大小 规格书
3页 165K
描述
PRE-BIASED SMALL SIGNAL SURFACE MOUNT PNP TRANSISTOR

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DDTA114YLP-7 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：DFN
包装说明：SMALL OUTLINE, R-PDSO-N3针数：3
Reach Compliance Code：compliantECCN代码：EAR99
Factory Lead Time：19 weeks风险等级：5.64
其他特性：BUILT-IN BIAS RESISTOR RATIO IS 4.7, HIGH RELIABILITY外壳连接：COLLECTOR
最大集电极电流 (IC)：0.1 A集电极-发射极最大电压：50 V
配置：SINGLE WITH BUILT-IN RESISTOR最小直流电流增益 (hFE)：80
JESD-30 代码：R-PDSO-N3JESD-609代码：e4
湿度敏感等级：1元件数量：1
端子数量：3最高工作温度：150 °C
封装主体材料：PLASTIC/EPOXY封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
极性/信道类型：PNP最大功率耗散 (Abs)：0.25 W
认证状态：Not Qualified子类别：BIP General Purpose Small Signal
表面贴装：YES端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：NO LEAD端子位置：DUAL
处于峰值回流温度下的最长时间：40晶体管元件材料：SILICON
标称过渡频率 (fT)：250 MHzBase Number Matches：1

DDTA114YLP-7 数据手册

 浏览型号DDTA114YLP-7的Datasheet PDF文件第2页浏览型号DDTA114YLP-7的Datasheet PDF文件第3页 
DDTA114YLP  
PRE-BIASED SMALL SIGNAL SURFACE MOUNT PNP TRANSISTOR  
Please click here to visit our online spice models database.  
Features  
•
•
•
•
•
•
Epitaxial Planar Die Construction  
Ultra-Small Leadless Surface Mount Package  
Ideally Suited for Automated Assembly Processes  
Lead Free By Design/RoHS Compliant (Note 1)  
"Green" Device (Note 2)  
1
2
3
E
2
3
R2  
C
R1  
1
B
Qualified to AEC-Q101 Standards for High Reliability  
Bottom View  
Top View  
Mechanical Data  
•
•
Case: DFN1006-3  
Case Material: Molded Plastic, "Green" Molding Compound.  
UL Flammability Classification Rating 94V-0  
DFN1006-3  
•
•
Moisture Sensitivity: Level 1 per J-STD-020D  
Terminal Connections: Collector Dot (See Diagram and  
Marking Information)  
Terminals: Finish — NiPdAu over Copper leadframe.  
Solderable per MIL-STD-202, Method 208  
Marking Information: See Page 3  
Ordering Information: See Page 3  
Weight: 0.0009 grams (approximate)  
B
1
C
3
OUT  
(or -supply)  
IN  
OUT  
(or -supply)  
C
3
10k  
Ω
B
IN  
1
R1  
R2  
E
E
•
47kΩ  
2
+ Supply  
or GND  
GND (or +supply)  
•
•
•
Schematic and Pin Configuration  
Equivalent Inverter Circuit  
Maximum Ratings @TA = 25°C unless otherwise specified  
Characteristic  
Supply Voltage  
Symbol  
VCC  
Value  
Unit  
V
-50  
+6 to -40  
-70  
Input Voltage  
V
VIN  
Output Current  
mA  
mA  
IO  
Output (Collector) Current  
-100  
Ic(max)  
Thermal Characteristics  
Characteristic  
Power Dissipation (Note 3) @TA = 25°C  
Power Derating above 25°C  
Symbol  
PD  
Value  
250  
2
Unit  
mW  
mW/°C  
Pder  
Thermal Resistance, Junction to Ambient Air (Note 3) @TA = 25°C  
(Equivalent to one heated junction of PNP)  
Operating and Storage Temperature Range  
500  
°C/W  
°C  
Rθ  
JA  
-55 to +150  
Tj, TSTG  
Electrical Characteristics: Discrete PNP Transistor (Q1) @TA = 25°C unless otherwise specified  
Characteristic  
Off Characteristics (Note 4)  
Symbol  
Min  
Typ  
Max  
Unit  
Test Condition  
Collector-Base Breakdown Voltage  
Collector-Emitter Breakdown Voltage  
Collector-Base Cut Off Current  
-50  
-50  
⎯
⎯
⎯
V
V
V(BR)CBO  
V(BR)CEO  
ICBO  
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
-0.1  
-0.5  
-0.2  
-0.3  
IC = -10μA, IE = 0  
IC = -1.0mA, IB = 0  
VCB = -50V, IE = 0  
VCB = -50V, IB = 0  
VEB = 4V, IC = 0  
μA  
μA  
mA  
V
Collector-Emitter Cut Off Current, IO(OFF)  
Emitter-Base Cut Off Current  
Input Off Voltage  
ICEO  
IEBO  
VI(OFF)  
⎯
VCC = -5V, IO = -100uA  
On Characteristics (Note 4)  
Input-On Voltage  
-1.4  
⎯
80  
V
mA  
⎯
V
VI(ON)  
II  
⎯
⎯
⎯
⎯
-0.1  
⎯
-0.88  
⎯
-0.25  
-0.3  
13  
VO = -0.3V, IO = IC = 1mA  
VI = -5V  
Input Current  
DC Current Gain  
hFE  
VCE = -5V, IC = -5mA  
Collector-Emitter Saturation Voltage  
Output On Voltage  
Input Resistance  
VCE(SAT)  
VO(ON)  
R1  
⎯
⎯
7
3.7  
IC = -50mA, IB = -2.5mA  
V
II = -0.25mA, IO = -5mA  
10  
4.7  
KΩ  
⎯
⎯
⎯
Resistance Ratio  
(R2/R1)  
5.7  
Small Signal Characteristics  
Current Gain-Bandwidth Product  
250  
MHz  
fT  
⎯
⎯
VCE = -10V, IE = -5mA, f = 100 MHz  
Notes:  
1. No purposefully added lead.  
2. Diodes Inc.'s "Green" policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.  
3. Device mounted on FR-4 PCB, 1” x 0.85” x 0.062”; pad layout as shown on page 3 or Diodes Inc. suggested pad layout document AP02001, which can  
be found on our website at http://www.diodes.com/datasheets/ap02001.pdf.  
4. Short duration pulse test used to minimize self-heating effect. Pulse width tp<300μS, Duty Cycle, d≤2%.  
DS30807 Rev. 5 - 2  
1 of 3  
www.diodes.com  
DDTA114YLP  
© Diodes Incorporated  
123

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