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DDC112Y

更新时间: 2024-10-28 12:33:07
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
34页 1146K
描述
Dual Current Input 20-Bit ANALOG-TO-DIGITAL CONVERTER

DDC112Y 数据手册

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®
D
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C1  
DDC112  
12  
D
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11  
2
SBAS085B – JANUARY 2000 – REVISED OCTOBER 2004  
Dual Current Input 20-Bit  
ANALOG-TO-DIGITAL CONVERTER  
FEATURES  
DESCRIPTION  
MONOLITHIC CHARGE MEASUREMENT A/D  
The DDC112 is a dual input, wide dynamic range, charge-  
digitizing analog-to-digital (A/D) converter with 20-bit resolu-  
tion. Low-level current output devices, such as photosensors,  
can be directly connected to its inputs. Charge integration is  
continuous as each input uses two integrators; while one is  
being digitized, the other is integrating.  
CONVERTER  
DIGITAL FILTER NOISE REDUCTION:  
3.2ppm, rms  
INTEGRAL LINEARITY:  
±0.005% Reading ±0.5ppm FSR  
For each of its two inputs, the DDC112 combines current-to-  
voltage conversion, continuous integration, programmable  
full-scale range, A/D conversion, and digital filtering to achieve  
a precision, wide dynamic range digital result. In addition to  
the internal programmable full-scale ranges, external integrat-  
ing capacitors allow an additional user-settable full-scale  
range of up to 1000pC.  
HIGH PRECISION, TRUE INTEGRATING FUNC-  
TION  
PROGRAMMABLE FULL-SCALE  
SINGLE SUPPLY  
CASCADABLE OUTPUT  
To provide single-supply operation, the internal A/D converter  
APPLICATIONS  
DIRECT PHOTOSENSOR DIGITIZATION  
utilizes a differential input, with the positive input tied to VREF  
.
When the integration capacitor is reset at the beginning of  
each integration cycle, the capacitor charges to VREF. This  
charge is removed in proportion to the input current. At the  
end of the integration cycle, the remaining voltage is com-  
CT SCANNER DAS  
INFRARED PYROMETER  
PRECISION PROCESS CONTROL  
LIQUID/GAS CHROMATOGRAPHY  
BLOOD ANALYSIS  
pared to VREF.  
The high-speed serial shift register which holds the result of  
the last conversion can be configured to allow multiple DDC112  
units to be cascaded, minimizing interconnections. The  
DDC112 is available in an SO-28 or TQFP-32 package and is  
offered in two performance grades.  
Protected by US Patent #5841310  
AVDD  
AGND  
VREF  
DVDD DGND  
CAP1A  
CAP1A  
CHANNEL 1  
DCLK  
IN1  
Dual  
Switched  
Integrator  
DVALID  
CAP1B  
CAP1B  
∆Σ  
Modulator  
DXMIT  
DOUT  
DIN  
Digital  
Filter  
Digital  
Input/Output  
CAP2A  
CAP2A  
CHANNEL 2  
RANGE2  
RANGE1  
RANGE0  
IN2  
Control  
Dual  
Switched  
Integrator  
CAP2B  
CAP2B  
TEST  
CLK  
CONV  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
Copyright © 2000-2004, Texas Instruments Incorporated  
www.ti.com  

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