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DAC-88-2/883 PDF预览

DAC-88-2/883

更新时间: 2024-11-06 00:37:23
品牌 Logo 应用领域
达特尔 - DATEL /
页数 文件大小 规格书
6页 216K
描述
High-Performance, 12-Bit DACs with Input Registers

DAC-88-2/883 数据手册

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DAC-88 Series  
High-Performance, 12-Bit DACs with Input Registers  
FEATURES  
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„
„
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12-Bit resolution  
Integral nonlinearity error ±1/2LSB, max.  
Differential nonlinearity error ±3/4LSB, max.  
MIL-STD-883 high-reliability versions available  
Input register  
3μs fast output settling time  
Guaranteed monotonicity over full temperature  
range  
PRODUCT OVERVIEW  
INPUT/OUTPUT CONNECTIONS  
The DAC-88 Series D/A converters are high  
pin programmable and include 0 to +10V, ±±V,  
and ±10V. The DAC-88 Series contains a precision  
zener reference circuit. This eliminates code-  
dependent ground currents by routing current from  
the positive supply to the internal ground node  
as determined by the R-2R ladder network. The  
internal feedback resistors for the on-board ampli-  
fier track the ladder network resistors, enhancing  
temperature performance. The excellent tracking  
of the resistors results in a differential nonlinearity  
tempco of ±2ppm/ꢀC maximum. The temperature  
coefficient of gain is ±20ppm/ꢀC maximum, and  
the tempco of zero is ±±ppm/ꢀC maximum.  
PIN FUNCTION  
PIN FUNCTION  
performance 12-bit devices with a fast settling  
voltage output. They are compatible and pin-pin  
replacement for the standard DAC88 and 3860  
series. They incorporate a level-controlled input  
storage register and are specifically designed for  
systems applications such as data bus interfacing  
with computers. When the “load/Register Enable”  
input is high, data in the storage register is held,  
and when the load input is low, data is transferred  
through to the DAC. There are two basic models  
available by coding option: binary and two’s com-  
plement. The output voltage ranges are externally  
1
BIT 1 (MSB)  
BIT 2  
24  
23  
22  
21  
20  
19  
18  
17  
16  
1±  
14  
13  
REFERENCE OUT  
2
GAIN ADJUST  
3
BIT 3  
+1±V SUPPLY  
GROUND  
4
BIT 4  
±
BIT ±  
SUMMING JUNCTION  
LOAD/Register Enable  
10V RANGE  
6
BIT 6  
7
BIT 7  
8
BIT 8  
BIPOLAR OFFSET  
REFERENCE IN  
VOLTAGE OUTPUT  
–1±V SUPPLY  
9
BIT 9  
10  
11  
12  
BIT 10  
BIT 11  
BIT 12 (LSB)  
+±V SUPPLY  
BLOCK DIAGRAM  
REF.  
OUT  
24  
GAIN  
ADJUST  
23  
REF.  
IN  
16  
+15V  
SUPPLY SUPPLY  
–15V  
+5V  
SUPPLY  
13  
BIPOLAR  
OFFSET  
17  
22  
14  
ꢀNȍ  
+5V  
18 10V RANGE  
D/A CONVERTER  
SUMMING  
20  
JUNCTION  
LOAD 19  
ꢀNȍ  
VOLTAGE  
15  
OUTPUT  
REGISTER  
74LS75  
REGISTER  
74LS75  
REGISTER  
74LS75  
21 GROUND  
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9 10 11 12  
9 10 11 12  
BITS  
MSB  
DIGITAL INPUTS  
LSB  
Figure 1. DAC-88 Functional Block Diagram  
DATEL, Inc. 11 Cabot Boulevard, Manseld, MA 02048-1151 USA  
Tel: (508) 339-3000  
www.datel.com  
e-mail: help@datel.com  
MDA_DAC-88.A01 Page 1 of 6  

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