Datasheet > CYPOSIC2GVC-K

CYPOSIC2GVC-K

更新时间： 2024-11-20 23:45:59

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
1页	24K
描述
Framers and Mappers

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中文翻译

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数据手册

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CYPOSIC2GVC-K 数据手册

CYPOSIC2GVC-K

PRELIMINARY

POSIC2GVC™/POSIC2G™ Evaluation Board

Standard MICTOR connectors are used on all buses for

external driving and observing signals.This permits the user to

Purpose

This board is intended for two purposes. The first is as a

demonstration of the capabilities of the (Packet-Over-SONET

Integrated Circuit) POSIC2GVC device. The second is as a

development platform for the system designer who wants to

evaluate the POSIC2GVC device, to create custom logic to

interface with POSIC2GVC, and to implement their own

functionality.

directly control all aspects of the board’s operation.

The evaluation board is powered by an external 3.3V power

supply. The board also has a 5V power supply connector, to

supply 5V to the 266-pin MICTOR connector on the board.

External Interfaces

The following signals are brought out through connectors:

• RS 232 debug port

Features

• UTOPIA/SPI-3 Level 3 signals

• TOH serial data interface

The features of this board include:

• Cypress POSIC2GVC device

• Processor data, address and control signals

• JTAG signals

• Cypress high-performance No Bus Latency (NoBL)

RAM, 12 MBytes

• Cypress CYS25G0101DX OC-48 SONET/SDH PHY

• Cypress Delta39K CPLD CY39100V388-200MGC

• Motorola MPC860 processor, operating at 66 MHz

• Two 300K gate FPGAs, each scalable to 600K gates

• OCP optical modules, 1310-nm wavelength

• Four independent clock sources on the board

• 16 MBytes of SDRAM

• BDM signals

• POSIC2GVC-SONET transmit and receive parallel data

bus

• NoBL SRAM interface signals

• Telephone Handset 4-wire interface

• POSIC2GVC Debug Port interface.

The evaluation board is a free-standing, 12-layer PCB with

mounting holes for support.

• 1 MByte of FLASH memory

See Figure 5 for an example using the MICTOR connectors to

replace the Motorola CPU with another device.

• Codec and handset for communication over orderwire

bytes.

Cypress

NoBL RAM

CY7C1370B

MICTOR

Cypress

CYS25G0101DX

OC-48 SERDES

OCP

Optical

module

Cypress

Quad

HOTLink II

CYP15G0401DX

SERDES

Xilinx

FPGA 1

Cypress

POSIC2GVC

MICTOR

Telephone

Handset

Jack

OKI semi

CODEC

MSM7717-01

Xilinx

FPGA 2

RS232

interface to

CPU

Cypress CPLD

CY39100V388-

200MGC

MICTOR

connector to

observe and

drive bus

1 MByte

Motorola

MPC860

Processor

16 MBytes

SDRAM

Boot

FLASH

Data, Control, Address Bus

Figure 1. POSIC2GVC Evaluation Board Block Diagram

Cypress Semiconductor Corporation

Document #: 38-02028 Rev. *B

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Revised May 9, 2003

中文翻译

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与CYPOSIC2GVC-K相关器件

型号	品牌	获取价格	描述	数据表
CYPSI2G100P456-1MGC	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456
CYPSI2G100SP456-1MGC	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456
CYPSI2G50P456-1MGC	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456
CYPSI2G50SP456-1MGC	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456
CYPSI5G100P456-1MGC	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456
CYPSI5G100SP456-1MGC	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456
CYPT1049DV33-12FZMB	INFINEON	获取价格	Asynchronous SRAM
CYPT1542AV18-250GCMB	INFINEON	获取价格	Synchronous SRAM
CYPT1543AV18-250GCMB	INFINEON	获取价格	Synchronous SRAM
CYPT1544AV18-250GCMB	INFINEON	获取价格	Synchronous SRAM

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