Datasheet > CYPSI2G100SP456-1MGC

CYPSI2G100SP456-1MGC

更新时间： 2024-11-06 20:54:07

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		外围集成电路
页数	文件大小	规格书
59页	744K
描述
Microprocessor Circuit, CMOS, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456

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CYPSI2G100SP456-1MGC 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	BGA,	针数：	456
Reach Compliance Code：	compliant	HTS代码：	8542.31.00.01
风险等级：	5.92	JESD-30 代码：	S-PBGA-B456
JESD-609代码：	e0	长度：	35 mm
端子数量：	456	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装形状：	SQUARE
封装形式：	GRID ARRAY	峰值回流温度（摄氏度）：	225
认证状态：	Not Qualified	座面最大高度：	2.46 mm
最大供电电压：	3.63 V	最小供电电压：	2.97 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	TIN LEAD	端子形式：	BALL
端子节距：	1.27 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	30	宽度：	35 mm
uPs/uCs/外围集成电路类型：	MICROPROCESSOR CIRCUIT	Base Number Matches：	1

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Programmable Serial Interface

Device Family (High Speed)

PRELIMINARY

Programmable Bandwidth

• Power-saving mode

Features

• Up to two serial channels available to allow:

— High-Bandwidth

• 200 Mbps – 1.5 Gbps, 2.5 Gbps serial signaling rate

• Flexible parallel-to-serial conversion in transmit path

• Flexible serial-to-parallel conversion in receive path

• Multiple selectable loopback/loop-through modes

• 50k to 200k usable gates of CPLD logic

— Redundancy

• Supported standards:

— InfiniBand™

— SONET OC-48

• 120k to 480 kB of integrated memory

— 96k to 384 kB of synchronous or asynchronous

SRAM

Frequency Agile PSI Features^[1]

— 24k to 96 kB of true Dual-Port or FIFO RAM

• Internal transmit and receive PLLs

• Logic dedicated Spread Aware PLL

• 200 Mbps–1.5 Gbps serial signaling rate per channel

• Up to eight serial channels available to allow:

— Frequency Agile

• Transmit FIFO for flexible variable phase clocking

— Redundancy

• Differential CML serial input with internal termination

and DC-restoration

• Differential CML serial output with source matched im-

pedance of 50Ω

• Selectable input and output clocking options

• MultiFrame™ receive framer provides alignment to:

— Bit, byte, half-word, word, multi-word

• 160–240 user programmable I/Os

• Any Volt I/O interface

— COMMA or Full K28.5 detect

— Single or Multi-byte framer for byte alignment

— Programmable as 1.8V, 2.5V, 3.3V

• Multiple I/O standards

— Low-latency option

• Skew alignment support for multiple bytes of offset

• Selectable parity check/generate

• Serial Built-In-Self-Test (BIST) for at-speed link testing

• Per-channel Link Quality Indicator

— Analog signal detect

— LVCMOS, LVTTL, 3.3V PCI, SSTL2(I-II), SSTL3(I-II),

HSTL(I-IV), and GTL+

• Direct interface to standard fiber-optic modules

• Designed to drive:

— fiberoptic modules

— Digital signal detect

— Frequency range detect

• Supported standards:

— Fibre Channel

— Gigabit Ethernet

— ESCON

— copper cables

— circuit board traces

— backplane links

— box-to-box links

— chip-to-chip communication

• Extremely flexible clocking options

— Four global clocks

— DVB

— SMPTE

— Up to 192 additional product term clocks

— Clock polarity at every register

Development Software

• Carry chain logic for fast and efficient arithmetic

operations

• Fully PCI compliant (Rev. 2.2)

• JTAG programming interface with boundary scan sup-

port

• High-Speed (HS) or Frequency Agile (FA) Programma-

ble Serial Interface (PSI) versions available

• Warp®

— IEEE 1076/1164 VHDL or IEEE 1364 Verilog context

sensitive editing

— Active-HDL FSM graphical finite state machine

editor

— Active-HDL SIM post-synthesis timing simulator

— Architecture Explorer for detailed design analysis

— Static Timing Analyzer for critical path analysis

— Available on Windows 95, 98 & NT for $99

High-Speed PSI Features

• 2.5 Gbps/channel serial signaling rate

• Full Bellcore and ITU jitter compliance

— Supports all Cypress programmable logic products

Note:

1. For detailed data sheet see “Frequency Agile PSI data sheet.”

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

Document #: 38-02021 Rev. **

Revised April 2001

12 3 4 5 6 7...59

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与CYPSI2G100SP456-1MGC相关器件

型号	品牌	获取价格	描述	数据表
CYPSI2G50P456-1MGC	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456
CYPSI2G50SP456-1MGC	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456
CYPSI5G100P456-1MGC	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456
CYPSI5G100SP456-1MGC	CYPRESS	获取价格	Microprocessor Circuit, CMOS, PBGA456, 35 X 35 MM, 2.33 MM HEIGHT, BGA-456
CYPT1049DV33-12FZMB	INFINEON	获取价格	Asynchronous SRAM
CYPT1542AV18-250GCMB	INFINEON	获取价格	Synchronous SRAM
CYPT1543AV18-250GCMB	INFINEON	获取价格	Synchronous SRAM
CYPT1544AV18-250GCMB	INFINEON	获取价格	Synchronous SRAM
CYPT1545AV18-250GCMB	INFINEON	获取价格	Synchronous SRAM
CYPT15B102Q-GGMB	INFINEON	获取价格	铁电存储器 (F-RAM)

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