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CYM1481APS-70C PDF预览

CYM1481APS-70C

更新时间: 2024-10-31 23:45:55
品牌 Logo 应用领域
其他 - ETC 内存集成电路静态存储器
页数 文件大小 规格书
8页 179K
描述
x8 SRAM Module

CYM1481APS-70C 数据手册

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1CYM1481A  
CYM1481A  
2048K x 8 SRAM Module  
are constructed from four 512K x 8 SRAMs in plastic sur-  
face-mount packages on an epoxy laminate board with pins.  
On-board decoding selects one of the SRAMs from the  
high-order address lines, keeping the remaining devices in  
standby mode for minimum power consumption.  
Features  
• High-density 16-megabit SRAM modules  
• High-speed CMOS SRAMs  
— Access time of 70 ns  
• Low active power  
An active LOW write enable signal (WE) controls the writ-  
ing/reading operation of the memory. When MS and WE inputs  
are both LOW, data on the eight data input/output pins is writ-  
ten into the memory location specified on the address pins.  
Reading the device is accomplished by selecting the device  
and enabling the outputs MS and OE active LOW while WE  
remains inactive or HIGH. Under these conditions, the content  
of the location addressed by the information on the address  
pins is present on the eight data input/output pins.  
— 605 mW (max.), 2M x 8  
• Double-sided SMD technology  
• TTL-compatible inputs and outputs  
• Small footprint SIP  
— PCB layout area of 0.72 sq. in.  
• 2V data retention (L version)  
Functional Description  
The input/output pins remain in a high-impedance state unless  
the module is selected, outputs are enabled, and write enable  
(WE) is HIGH.  
The CYM1481A is a high-performance 16-megabit static RAM  
module organized as 2048K words by 8 bits. These modules  
Logic Block Diagram  
Pin Configuration  
SIP  
Top View  
A
1
2
3
4
5
6
19  
A –A  
0
18  
V
CC  
512K x 8  
SRAM  
19  
WE  
I/O  
2
I/O  
3
OE  
WE  
I/O  
0
A
A
A
A
7
8
9
10  
11  
12  
13  
14  
1
2
3
A
–A  
19 20  
4
2
GND  
I/O  
5
512K x 8  
SRAM  
1 of 4  
DECODER  
A
10  
A
11  
A
5
15  
16  
17  
18  
MS  
A
A
13  
14  
A
20  
MS  
19  
20  
21  
22  
23  
24  
25  
26  
27  
A
A
15  
16  
512K x 8  
SRAM  
A
A
12  
18  
A
6
I/O  
1
GND  
A
0
A
7
A
8
28  
29  
512K x 8  
SRAM  
A
9
30  
31  
32  
I/O  
7
I/O  
4
I/O  
33  
34  
35  
36  
6
A
17  
V
CC  
I/O –I/O  
0
7
8
OE  
1481-1  
/
Selection Guide  
CYM1481A  
Maximum Access Time (ns)  
70  
110  
64  
85  
110  
64  
100  
110  
64  
120  
110  
64  
Maximum Operating Current (mA)  
Maximum Standby Current (mA)  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
October 1990 - Revised April 16, 2001  

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