Datasheet > CY8C41223

CY8C41223

更新时间： 2024-11-05 04:38:11

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
36页	827K
描述
Linear Power PSoC⑩ Devices

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中文翻译

获取价格

数据手册

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CY8C41223 数据手册

CY8C41123 and CY8C41223

PRELIMINARY

Linear Power PSoC™ Devices

• 2 Comparators with DAC References

• 6- to 12-Bit ADC (20 Ksps at 8 Bits)

• Configurable Analog Mux, 10:1 or 5:2 Differential

• Configurable Digital Blocks

1.0 Features

1.1

Key Features

• Extended Operating Voltage of 2.5V to 36V

• 2 HV Linear Opamp Control Loops for Driving Power PFETs

—8- to 16-Bit Timers and Counters

—Connectable to All GPIO Pins

• 2 HV Analog Sense Inputs

• 4KB of Flash

—Digital Blocks can Drive Outputs to 36V

—Complex Peripherals by Combining Blocks

• 256 Bytes of SRAM

1.3

Applications

1.2

Improved Features

• Battery Chargers (Linear or Fly Back)

• White LED Drivers

• Very Low Current Mode for 100 nA Sleep (Deep Sleep)

• Analog Absolute Accuracy (0.75%)

• Additional Flexibility for Sleep Modes

• Temperature Sensor (Thermistor, Thermocouple)

2.0 Block Diagram

LowDrop-Out

Regulator

ANALOG and HIGH VOLTAGE

SECTIONS

HVdd

InternalVdd

ODAC1

ODAC0

VBG

VDAC1

VDAC0

VDAC1

VDAC0

IBIAS

GDO1

VS1

GDO0

VS0

Analogto

Digital

Convertor

P0[7]

P0[5]

P0[3]

P0[1]

P1[1]

P0[6]

P0[4]

P0[2]

P0[0]

P1[0]

Atten1

Atten0

AMuxBus3

AMuxBus1

AMuxBus2

AMuxBus0

SYSTEMRESOURCES

PSoCCORE

LowSpeed

Oscillator

SleepandWatchdog

COMP1

COMP0

POR andLVD

Internal

Voltage

Reference

ODAC1

ODAC0

M8CCPU

PSoCCORE

Internal

Main

Oscillator

4KBFlash

GlobalDigitalInterconnectBus

System Bus

256BSRAM

I2C

DBC00

DBC01

DBD02

DBD03

SystemResets

Digital

Clocks

DigitalPSoCBlockArray

1DigitalRow

InterruptController

DIGITAL SYSTEM

Figure 2-1. Block Diagram

Cypress Semiconductor Corporation

Document 001-00360 Rev. *A

•

198 Champion Court

•

San Jose, CA 95134

•

408.943.2600

Revised November 17, 2005

12 3 4 5 6 7...36

中文翻译

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