Datasheet > 存储 > FIFO> CY7C4281-10JI

CY7C4281-10JI

更新时间： 2024-01-20 08:30:49

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		先进先出芯片
页数	文件大小	规格书
16页	432K
描述
64K/128K x 9 Deep Sync FIFOs

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

CY7C4281-10JI 数据手册

CY7C4281 CY7C429164K/128K

x 9 Deep Sync FIFOs

CY7C4281

CY7C4291

64K/128K x 9 Deep Sync FIFOs

• Pb-Free Packages Available

Features

Functional Description

• High-speed, low-power, first-in first-out (FIFO)

memories

The CY7C4281/91 are high-speed, low-power FIFO

memories with clocked read and write interfaces. All are nine

bits wide. The CY7C4281/91 are pin-compatible to the

CY7C42X1 Synchronous FIFO family. Programmable

features include Almost Full/Almost Empty flags. These FIFOs

provide solutions for a wide variety of data buffering needs,

including high-speed data acquisition, multiprocessor inter-

faces, and communications buffering.

• 64K × 9 (CY7C4281)

• 128K × 9 (CY7C4291)

• 0.5-micron CMOS for optimum speed/power

• High-speed 100-MHz operation (10-ns read/write cycle

times)

• Low power

— I_CC= 40 mA

— I_SB= 2 mA

These FIFOs have nine-bit input and output ports that are

controlled by separate clock and enable signals. The input port

is controlled by a free-running clock (WCLK) and two

write-enable pins (WEN1, WEN2/LD).

• Fully asynchronous and simultaneous read and write

operation

When WEN1 is LOW and WEN2/LD is HIGH, data is written

into the FIFO on the rising edge of the WCLK signal. While

WEN1, WEN2/LD is held active, data is continually written into

the FIFO on each WCLK cycle. The output port is controlled in

a similar manner by a free-running read clock (RCLK) and two

read enable pins (REN1, REN2). In addition, the

CY7C4281/91 has an output enable pin (OE). The read

(RCLK) and write (WCLK) clocks may be tied together for

single-clock operation or the two clocks may be run indepen-

dently for asynchronous read/write applications. Clock

frequencies up to 100 MHz are achievable. Depth expansion

is possible using one enable input for system control, while the

other enable is controlled by expansion logic to direct the flow

of data.

• Empty, Full, and programmable Almost Empty and

Almost Full status flags

• TTL compatible

• Output Enable (OE) pin

• Independent read and write enable pins

• Center power and ground pins for reduced noise

• Supports free-running 50% duty cycle clock inputs

• Width Expansion Capability

• Pin-compatible density upgrade to CY7C42X1

family

• Pin-compatible density upgrade to

IDT72201/11/21/31/41/51

0–8

Pin Configuration

Logic Block Diagram

INPUT

PLCC

Top View

WCLK WEN1 WEN2/LD

32 31 30

PAF

PAE

FLAG

PROGRAM

WEN1

WCLK

WEN2/LD

WRITE

CONTROL

CY7C4281

CY7C4291

GND

REN1

RCLK

REN2

PAE

PAF

FLAG

LOGIC

Dual Port

14 15 16 17 18 19 20

RAMARRAY

64K x 9

128K x 9

WRITE

POINTER

READ

POINTER

RESET

LOGIC

THREE-STATE

OUTPUT REGISTER

READ

CONTROL

0–8

RCLK REN1 REN2

Cypress Semiconductor Corporation

Document #: 38-06007 Rev. *C

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Revised August 2, 2005

12 3 4 5 6 7...16

中文翻译

下载PDF

与CY7C4281-10JI相关器件

型号	品牌	获取价格	描述	数据表
CY7C4281-10JIT	CYPRESS	获取价格	FIFO, 64KX9, 8ns, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32
CY7C4281-15JC	CYPRESS	获取价格	64K/128K x 9 Deep Sync FIFOs
CY7C4281-25JC	CYPRESS	获取价格	64K/128K x 9 Deep Sync FIFOs
CY7C4281-25JCR	CYPRESS	获取价格	暂无描述
CY7C4281-25JI	CYPRESS	获取价格	FIFO, 64KX9, 15ns, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32
CY7C4281V	CYPRESS	获取价格	16K/32K/64K/128K x 9 Low-Voltage Deep Sync FIFOs
CY7C4281V-10JC	CYPRESS	获取价格	16K/32K/64K/128K x 9 Low-Voltage Deep Sync FIFOs
CY7C4281V-10JXC	CYPRESS	获取价格	16K/32K/64K/128K x 9 Low-Voltage Deep Sync⑩ F
CY7C4281V-15JC	CYPRESS	获取价格	16K/32K/64K/128K x 9 Low-Voltage Deep Sync FIFOs
CY7C4281V-15JCR	CYPRESS	获取价格	FIFO, 64KX9, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32

与CY7C4281-10JI相关文章

MAX232IDR数据手册：产品特性、电气参数、替代型号推荐
2024-07-02

1
2N7002DW数据手册：参数解读、引脚信息、替代型号推荐
2024-07-02

1
网络滤波器、EMI滤波器与EMC滤波器在电子元器件中的分类关系
2024-07-02

2
NTC热敏电阻与PTC热敏电阻的应用原理及选型原则
2024-07-02

2

产品中心

服务支持

精选活动

关于我们

帮助中心

CY7C4281-10JI

CY7C4281-10JI 数据手册

与CY7C4281-10JI相关器件

与CY7C4281-10JI相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

CY7C4281-10JI

CY7C4281-10JI 数据手册

与CY7C4281-10JI相关器件

与CY7C4281-10JI相关文章

您还可以找

您在本页遇到什么问题？