Datasheet > CY7C331

CY7C331

更新时间： 2024-11-21 06:51:47

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
18页	428K
描述
Asynchronous Registered EPLD

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中文翻译

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数据手册

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CY7C331 数据手册

1CY7C331

fax id: 6016

CY7C331

Asynchronous Registered EPLD

• Low power

Features

— 90 mA typical I_CCquiescent

— 180 mA I_CCmaximum

• Twelve I/O macrocells each having:

— One state ﬂip-ﬂop with an XOR sum-of-products

input

— UV-erasable and reprogrammable

— Programming and operation 100% testable

— One feedback ﬂip-ﬂop with input coming from the

I/O pin

Functional Description

— Independent (product term) set, reset, and clock in-

puts on all registers

The CY7C331 is the most versatile PLD available for asyn-

chronous designs. Central resources include twelve full D-type

ﬂip-ﬂops with separate set, reset, and clock capability. For in-

creased utility, XOR gates are provided at the D-inputs and the

product term allocation per ﬂip-ﬂop is variably distributed.

— Asynchronous bypass capability on all registers un-

der product term control (r = s = 1)

— Global or local output enable on three-state I/O

— Feedback from either register to the array

I/O Resources

• 192 product terms with variable distribution to macro-

cells

• 13 inputs, 12 feedback I/O pins, plus 6 shared I/O mac-

rocell feedbacks for a total of 31 true and complemen-

tary inputs

• High speed: 20 ns maximum t_PD

• Security bit

Pins 1 through 7 and 9 through 14 serve as array inputs; pin

14 may also be used as a global output enable for the I/O

macrocell three-state outputs. Pins 15 through 20 and 23

through 28 are connected to I/O macrocells and may be man-

aged as inputs or outputs depending on the conﬁguration and

the macrocell OE terms.

• Space-saving 28-pin slim-line DIP package; also avail-

able in 28-pin PLCC

Logic Block Diagram

OE/I

GND

PROGRAMMABLE AND ARRAY

(192x62)

I/O

C331–1

I/O

GND

I/O

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

January 1989 – Revised December 1992

12 3 4 5 6 7...18

中文翻译

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CY7C331-25HC	CYPRESS	获取价格	Asynchronous Registered EPLD
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