Datasheet > CY7C1301A-133AC

CY7C1301A-133AC

更新时间： 2024-02-23 19:14:52

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		时钟静态存储器内存集成电路
页数	文件大小	规格书
15页	218K
描述
Dual-Port SRAM, 256KX36, 4ns, CMOS, PQFP176, 24 X 24 MM, 1.40 MM HEIGHT, TQFP-176

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CY7C1301A-133AC 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	QFP	包装说明：	24 X 24 MM, 1.40 MM HEIGHT, TQFP-176
针数：	176	Reach Compliance Code：	compliant
ECCN代码：	3A991.B.2.A	HTS代码：	8542.32.00.41
风险等级：	5.91	Is Samacsys：	N
最长访问时间：	4 ns	最大时钟频率 (fCLK)：	133 MHz
I/O 类型：	COMMON	JESD-30 代码：	S-PQFP-G176
JESD-609代码：	e0	长度：	24 mm
内存密度：	9437184 bit	内存集成电路类型：	DUAL-PORT SRAM
内存宽度：	36	功能数量：	1
端口数量：	2	端子数量：	176
字数：	262144 words	字数代码：	256000
工作模式：	SYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	256KX36
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装等效代码：	QFP176,1.0SQ,20
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
并行/串行：	PARALLEL	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	3.3 V	认证状态：	Not Qualified
座面最大高度：	1.6 mm	最大待机电流：	0.1 A
最小待机电流：	3.14 V	子类别：	SRAMs
最大压摆率：	0.4 mA	最大供电电压 (Vsup)：	3.465 V
最小供电电压 (Vsup)：	3.135 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	24 mm	Base Number Matches：	1

CY7C1301A-133AC 数据手册

301A

PRELIMINARY

CY7C1301A

256K X 36 Dual I/O Dual Address Synchronous SRAM

The CY7C1301A allows the user to concurrently perform

reads, writes, or pass-through cycles in combination on the

Features

• Fast clock speed: 133, 100, and 83 MHz

• Fast Access Times: 4.0/5.0/6.0 ns Max.

• Single Clock Operation

two data ports. The two address ports (AX, AY) determine the

read or write locations for their respective data ports (DQX,

DQY).

All input pins except output enable pins (OEX, OEY) are gated

by registers controlled by a positive-edge-triggered clock input

(CLK). The synchronous inputs include all addresses, all data

inputs, depth-expansion chip enables (CE1X, CE2X, CE1Y

and CE2Y), pass-through controls (PTX and PTY), and

read-write control (WEX and WEY).

• Single 3.3V –5% and +5% power supply VCC

• Separate VCCQ for output buffer

• Two chip enables for simple depth expansion

• Address, DataInput, CE1X, CE2X, CE1Y, CE2Y, PTX, PTY,

WEX, WEY, and Data Output Registers On-Chip

• Concurrent Reads and Writes

• Two bidirectional Data Buses

• Can be configured as separate I/O

• Pass-Through feature

• Asynchronous Output Enables (OEX, OEY)

• LVTTL-Compatible I/O

The pass-through feature allows data to be passed from one

port to the other, in either direction. The PTX# input must be

asserted to pass data from port X to port Y. The PTY# will

likewise pass data from port Y to port X. A pass-through oper-

ation takes precedence over a read operation.

For the case when AX and AY are the same, certain protocols

are followed. If both ports are read, the reads occur normally.

If one port is written and the other is read, the read from the

array will occur before the data is written. If both ports are

written, only the data on DQY will be written to the array.

• Self-Timed write

• Automatic power-down

• 176-Pin TQFP Package

The CY7C1301A operate from a +3.3V power supply. All in-

puts and outputs are LVTTL compatible. These dual I/O, dual

address synchronous SRAMs are well suited for ATM, Ether-

net switches, routers, cell/frame buffers, SNA switches and

shared memory applications.

Functional Description

The CY7C1301A SRAM integrates 262,144 x 36 SRAM cells

with advanced synchronous peripheral circuitry. It employs

high-speed, low power CMOS designs using advanced tri-

ple-layer polysilicon, double-layer metal technology. Each

memory cell consists of four transistors and two high valued

resistors.

The CY7C1301A device needs one extra cycle after power for

proper power on reset. The extra cycle is needed after Vcc is

stable on the device.

This device is available in a 176-pin TQFP package.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

Document #: 38-05076 Rev. **

Revised June 6, 2001

12 3 4 5 6 7...15

中文翻译

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与CY7C1301A-133AC相关器件

型号	品牌	获取价格	描述	数据表
CY7C1301A-83AC	CYPRESS	获取价格	Dual-Port SRAM, 256KX36, 6ns, CMOS, PQFP176, 24 X 24 MM, 1.40 MM HEIGHT, TQFP-176
CY7C1301A-83BGC	CYPRESS	获取价格	Dual-Port SRAM, 256KX36, 6ns, CMOS, PQFP176, 24 X 24 MM, 1.40 MM HEIGHT, TQFP-176
CY7C130-25DC	ETC	获取价格	x8 Dual-Port SRAM
CY7C130-25LC	CYPRESS	获取价格	Multi-Port SRAM, 1KX8, 25ns, CMOS, CQCC48, CERAMIC, LCC-48
CY7C130-25PC	ETC	获取价格	x8 Dual-Port SRAM
CY7C1302BV25-133BZC	CYPRESS	获取价格	QDR SRAM, 512KX18, 3ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, 1 MM PITCH, FBGA-165
CY7C1302BV25-200BZC	CYPRESS	获取价格	QDR SRAM, 512KX18, 2.3ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, 1 MM PITCH, FBGA-165
CY7C1302CV25	CYPRESS	获取价格	9-Mbit Burst of Two Pipelined SRAMs with QDR⑩
CY7C1302CV25-100	CYPRESS	获取价格	9-Mbit Burst of Two Pipelined SRAMs with QDR⑩
CY7C1302CV25-100BZC	CYPRESS	获取价格	9-Mbit Burst of Two Pipelined SRAMs with QDR⑩

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