Datasheet > CY7C1041GN18

CY7C1041GN18

更新时间： 2024-01-06 10:13:07

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
18页	660K
描述
4-Mbit (256K words Ã 16 bit) Static RAM

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中文翻译

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数据手册

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CY7C1041GN18 数据手册

CY7C1041GN

4-Mbit (256K words × 16 bit) Static RAM

4-Mbit (256K words

× 16 bit) Static RAM

Data writes are performed by asserting the Chip Enable (CE) and

Write Enable (WE) inputs LOW, while providing the data on I/O₀

through I/O₁₅and address on A₀through A₁₇pins. The Byte High

Enable (BHE) and Byte Low Enable (BLE) inputs control write

operations to the upper and lower bytes of the specified memory

location. BHE controls I/O₈through I/O₁₅and BLE controls I/O₀

through I/O₇.

Features

■ High speed

❐ t_AA= 10 ns / 15 ns

■ Low active and standby currents

❐ Active current: I_CC= 38-mA typical

❐ Standby current: I_SB2= 6-mA typical

Data reads are performed by asserting the Chip Enable (CE) and

■ Operating voltage range: 1.65 V to 2.2 V, 2.2 V to 3.6 V, and

4.5 V to 5.5 V

Output Enable (OE) inputs LOW and providing the required

address on the address lines. Read data is accessible on the I/O

lines (I/O₀through I/O₁₅). Byte accesses can be performed by

asserting the required byte enable signal (BHE or BLE) to read

either the upper byte or the lower byte of data from the specified

address location.

■ 1.0-V data retention

■ TTL-compatible inputs and outputs

■ Pb-free 44-pin SOJ, 44-pin TSOP II, and 48-ball VFBGA

packages

All I/Os (I/O₀through I/O₁₅) are placed in a high-impedance state

during the following events:

Functional Description

■ The device is deselected (CE HIGH)

CY7C1041GN is high-performance CMOS fast static RAM

Organized as 256K words by 16-bits.

■ The control signals (OE, BLE, BHE) are de-asserted

The logic block diagram is on page 2.

Product Portfolio

Power Dissipation

Speed

Operating I_CC, (mA)

(ns)

Product

Range

V_CCRange (V)

Standby, I_SB2(mA)

f = f_max

10/15

Typ ^[1]

–

Max

Typ ^[1]

Max

CY7C1041GN18

Industrial

1.65 V–2.2 V

2.2 V–3.6 V

4.5 V–5.5 V

CY7C1041GN30

CY7C1041GN

Notes

1. Typical values are included only for reference and are not guaranteed or tested. Typical values are measured at V = 1.8 V (for a V range of 1.65 V–2.2 V),

= 3 V (for a V range of 2.2 V–3.6 V), and V = 5 V (for a V range of 4.5 V–5.5 V), T = 25 °C.

CC CC CC A

Cypress Semiconductor Corporation

Document Number: 001-95413 Rev. *B

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised February 1, 2016

12 3 4 5 6 7...18

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与CY7C1041GN18相关器件

型号	品牌	获取价格	描述	数据表
CY7C1041GN30	CYPRESS	获取价格	4-Mbit (256K words Ã 16 bit) Static RAM
CY7C1041GN30-10BVXI	INFINEON	获取价格	Asynchronous SRAM
CY7C1041GN30-10VXI	INFINEON	获取价格	Asynchronous SRAM
CY7C1041GN30-10VXIT	INFINEON	获取价格	Asynchronous SRAM
CY7C1041GN30-10ZSXI	CYPRESS	获取价格	Standard SRAM, 256KX16, 10ns, CMOS, PDSO44, LEAD FREE, TSOP2-44
CY7C1041GN30-10ZSXI	INFINEON	获取价格	Asynchronous SRAM
CY7C1041L-15VC	CYPRESS	获取价格	256K x 16 Static RAM
CY7C1041L-15ZC	CYPRESS	获取价格	256K x 16 Static RAM
CY7C1041L-17VC	CYPRESS	获取价格	256K x 16 Static RAM
CY7C1041L-17ZC	CYPRESS	获取价格	256K x 16 Static RAM

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