Datasheet > CY7C1020_01

CY7C1020_01

更新时间： 2024-01-21 11:19:25

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
10页	186K
描述
32K x 16 Static RAM

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中文翻译

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数据手册

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CY7C1020_01 数据手册

CY7C1020

Switching Waveforms

Read Cycle No. 1^{[8, 9]}

ADDRESS

OHA

DATA OUT

PREVIOUS DATA VALID

DATA VALID

1020-5

Read Cycle No. 2(OEControlled) ^{[9, 10]}

ADDRESS

ACE

HZOE

DOE

BHE, BLE

LZOE

HZCE

DBE

LZBE

HZBE

HIGH

IMPEDANCE

HIGH IMPEDANCE

DATA OUT

DATA VALID

LZCE

ICC

50%

SUPPLY

CURRENT

IISB

1020-6

Notes:

8. Device is continuously selected. OE, CE, BHE and/or BHE = V_IL.

9. WE is HIGH for read cycle.

10. Address valid prior to or coincident with CE transition LOW.

Document #: 38-05058 Rev. **

Page 5 of 10

1 2 3 456 7 8...10

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与CY7C1020_01相关器件

型号	品牌	获取价格	描述	数据表
CY7C1020-10VC	CYPRESS	获取价格	32K x 16 Static RAM
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CY7C1020-10ZC	CYPRESS	获取价格	32K x 16 Static RAM
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CY7C1020-12VC	CYPRESS	获取价格	32K x 16 Static RAM
CY7C1020-12VCT	CYPRESS	获取价格	Standard SRAM, 32KX16, 12ns, CMOS, PDSO44, 0.400 INCH, PLASTIC, SOJ-44
CY7C1020-12ZC	CYPRESS	获取价格	32K x 16 Static RAM
CY7C1020-12ZCT	CYPRESS	获取价格	Standard SRAM, 32KX16, 12ns, CMOS, PDSO44, TSOP2-44
CY7C1020-15VC	CYPRESS	获取价格	32K x 16 Static RAM
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