CY7C1019BN-12ZXCT

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CY7C1019BN-12ZXCT 数据手册

CY7C1019BN

Switching Waveforms (continued)

Write Cycle No. 1 (CE Controlled)^{[12, 13]}

ADDRESS

SCE

PWE

DATA I/O

DATA VALID

Write Cycle No. 2 (WE Controlled, OE HIGH During Write)^{[12, 13]}

ADDRESS

SCE

PWE

DATA VALID

DATA I/O

NOTE 14

HZOE

Notes:

12. Data I/O is high impedance if OE = V

13. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.

14. During this period the I/Os are in the output state and input signals should not be applied.

Document #: 001-06425 Rev. **

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型号	品牌	获取价格	描述	数据表
CY7C1019BN-15VC	CYPRESS	获取价格	128K x 8 Static RAM
CY7C1019BN-15ZXC	CYPRESS	获取价格	128K x 8 Static RAM
CY7C1019BN-15ZXCT	CYPRESS	获取价格	Standard SRAM, 128KX8, 15ns, CMOS, PDSO32, LEAD FREE, TSOP2-32
CY7C1019B-V	ATMEL	获取价格	Supports the ATmega2560, ATmega1280 and ATmega640
CY7C1019BV33	CYPRESS	获取价格	128K x 8 Static RAM
CY7C1019BV33-10VC	CYPRESS	获取价格	128K x 8 Static RAM
CY7C1019BV33-10VCT	CYPRESS	获取价格	Standard SRAM, 128KX8, 10ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32
CY7C1019BV33-10ZC	CYPRESS	获取价格	128K x 8 Static RAM
CY7C1019BV33-12VC	CYPRESS	获取价格	128K x 8 Static RAM
CY7C1019BV33-12VCT	CYPRESS	获取价格	Standard SRAM, 128KX8, 12ns, CMOS, PDSO32, 0.400 INCH, PLASTIC, SOJ-32