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CY7C04312BV PDF预览

CY7C04312BV

更新时间: 2024-11-07 04:53:31
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
37页 828K
描述
10 Gb/s 3.3V QuadPort DSE Family

CY7C04312BV 数据手册

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CY7C0430BV  
CY7C04312BV  
CY7C04314BV  
10 Gb/s 3.3V QuadPort™  
DSE Family  
BIST (Built-In Self-Test) controller  
DualChipEnablesonallportsforeasydepthexpansion  
Separate upper-byte and lower-byte controls on all  
ports  
Simple array partitioning (CY7C0430BV only)  
Internal maskregister controlscounter wrap-around  
Counter-Interrupt flags to indicate wrap-around  
Counter and mask registers readback on address  
Features  
QuadPort™ datapath switching element (DSE) family  
allows four independent ports of access for data path  
management and switching  
• High-bandwidth data throughput up to 10 Gb/s  
• 133-MHz[1] port speed x 18-bit-wide interface × 4 ports  
• High-speed clock to data access 4.2 ns (max.)  
Synchronous pipelined devices  
1-Mb, ½-Mb, and ¼-Mb switch arrays  
272-ball BGA package (27-mm × 27-mm × 1.27-mm ball  
pitch)  
64K/32K/16K × 18 device options  
0.25-micron CMOS for optimum speed/power  
IEEE 1149.1 JTAG boundary scan  
Commercial and industrial temperature ranges  
3.3V low operating power  
Active = 750 mA (maximum)  
Width and depth expansion capabilities  
Standby = 15 mA (maximum  
QuadPort DSE Family Applications  
PORT 1  
PORT 3  
PORT 2  
PORT 4  
BUFFERED SWITCH  
PORT 2  
PORT 3  
PORT 4  
PORT 1  
REDUNDANT DATA MIRROR  
Note:  
1. fMAX2 for commercial is 135 MHz and for industrial is 133 MHz.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Document #: 38-06027 Rev. *A  
Revised May 14, 2002  

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