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CY74FCT823ATSOCTG4 PDF预览

CY74FCT823ATSOCTG4

更新时间: 2024-11-25 15:46:31
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
15页 890K
描述
FCT SERIES, 9-BIT DRIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24

CY74FCT823ATSOCTG4 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP24,.4
针数:24Reach Compliance Code:unknown
风险等级:5.16系列:FCT
JESD-30 代码:R-PDSO-G24长度:15.4 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:71400000 Hz最大I(ol):0.064 A
位数:9功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP24,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:10 ns传播延迟(tpd):20 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:FF/Latches最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.5 mmBase Number Matches:1

CY74FCT823ATSOCTG4 数据手册

 浏览型号CY74FCT823ATSOCTG4的Datasheet PDF文件第2页浏览型号CY74FCT823ATSOCTG4的Datasheet PDF文件第3页浏览型号CY74FCT823ATSOCTG4的Datasheet PDF文件第4页浏览型号CY74FCT823ATSOCTG4的Datasheet PDF文件第5页浏览型号CY74FCT823ATSOCTG4的Datasheet PDF文件第6页浏览型号CY74FCT823ATSOCTG4的Datasheet PDF文件第7页 
CY74FCT823T  
9-BIT BUS-INTERFACE REGISTER  
WITH 3-STATE OUTPUTS  
SCCS069A – OCTOBER 2001 – REVISED NOVEMBER 2001  
P, Q, OR SO PACKAGE  
(TOP VIEW)  
Function, Pinout, and Drive Compatible  
With FCT, F Logic, and AM29823  
Reduced V  
Equivalent FCT Functions  
(Typically = 3.3 V) Version of  
OH  
OE  
1
2
3
4
5
6
7
8
9
10  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
Y
Y
Y
Y
Y
Y
Y
Y
Y
CC  
0
D
D
D
D
D
D
D
D
D
0
1
2
3
4
5
6
7
8
Edge-Rate Control Circuitry for  
Significantly Improved Noise  
Characteristics  
1
2
3
I
Supports Partial-Power-Down Mode  
4
off  
Operation  
5
6
Matched Rise and Fall Times  
7
Fully Compatible With TTL Input and  
Output Logic Levels  
8
CLR 11  
14 EN  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
GND 12  
13 CP  
– 1000-V Charged-Device Model (C101)  
64-mA Output Sink Current  
32-mA Output Source Current  
High-Speed Parallel Register With  
Positive-Edge-Triggered D-Type Flip-Flops  
Buffered Common Clock-Enable (EN) and  
Asynchronous-Clear (CLR) Inputs  
3-State Outputs  
description  
This bus-interface register is designed to eliminate the extra packages required to buffer existing registers and  
provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT823T is a  
9-bit-wide buffered register with clock-enable (EN) and clear (CLR) inputs that are ideal for parity bus interfacing  
in high-performance microprogrammed systems. It is ideal for use as an output port requiring high I /I  
.
OL OH  
This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading  
at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

CY74FCT823ATSOCTG4 替代型号

型号 品牌 替代类型 描述 数据表
CY74FCT823CTSOC TI

完全替代

8-/9-/10-Bit Bus Interface Registers
CY74FCT823ATSOCT TI

完全替代

8-/9-/10-Bit Bus Interface Registers
CY74FCT823ATSOC TI

完全替代

8-/9-/10-Bit Bus Interface Registers

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