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CY74FCT163543SSOP PDF预览

CY74FCT163543SSOP

更新时间: 2024-02-01 03:31:44
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
7页 67K
描述
16-Bit Latched Transceiver

CY74FCT163543SSOP 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:SSOP包装说明:0.300 INCH, 0.025 INCH PITCH, SSOP-56
针数:56Reach Compliance Code:not_compliant
风险等级:5.34Is Samacsys:N
其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:FCT
JESD-30 代码:R-PDSO-G56JESD-609代码:e0
长度:18.415 mm负载电容(CL):50 pF
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER最大I(ol):0.024 A
位数:8功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP56,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH包装方法:TAPE AND REEL
电源:3/3.3 VProp。Delay @ Nom-Sup:5.1 ns
传播延迟(tpd):5.6 ns认证状态:Not Qualified
座面最大高度:2.794 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
翻译:N/A宽度:7.5 mm
Base Number Matches:1

CY74FCT163543SSOP 数据手册

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CY74FCT163543  
Electrical Characteristics Over the Operating Range VCC=2.7V to 3.6V  
Parameter  
VIH  
Description  
Input HIGH Voltage  
Input LOW Voltage  
Input Hysteresis[6]  
Test Conditions  
Min.  
Typ.[5] Max.  
Unit  
V
2.0  
5.5  
VIL  
VH  
VIK  
IIH  
0.8  
V
100  
mV  
V
Input Clamp Diode Voltage  
Input HIGH Current  
Input LOW Current  
VCC=Min.,  
IIN=18 mA  
VCC=5.5V  
VCC=GND  
VOUT=5.5V  
0.7  
1.2  
+1  
VCC=Max.,  
VCC=Max.,  
µA  
µA  
µA  
IIL  
+1  
IOZH  
High Impedance Output Current VCC=Max.,  
(Three-State pins)  
+1  
IOZL  
IODL  
IODH  
VOH  
High Impedance Output Current VCC=Max.,  
(Three-State pins)  
VOUT=GND  
+1  
µA  
mA  
mA  
V
Output LOW Current[7]  
Output HIGH Current[7]  
Output HIGH Voltage  
VCC=3.3V,  
OUT=1.5V  
VIN=VIH or VIL,  
VIN=VIH or VIL,  
50  
90  
200  
V
VCC=3.3V,  
OUT=1.5V  
36  
60  
110  
V
VCC=Min.,  
CC=3.0V,  
IOH=0.1 mA  
IOH=8 mA  
IOH=24 mA  
IOL=0.1mA  
IOL=24mA  
V
CC0.2  
V
2.4  
3.0  
3.0  
VCC=3.0V,  
VCC=Min.,  
VCC=Min.,  
VCC=Max.,  
VCC=0V,  
2.0  
VOL  
IOS  
Output LOW Voltage  
0.2  
0.5  
V
3.0  
Short Circuit Current[7]  
Power-Off Disable  
VOUT=GND  
VOUT<4.5V  
60  
135  
240  
+100  
mA  
IOFF  
µA  
Notes:  
1. A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA, and OEBA.  
2. Data prior to LEAB LOW-to-HIGH Transition H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance.  
3. Operation beyond the limits set forth may impair the useful life of the device. Unless noted, these limits are over the operating free-air temperature range.  
4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.  
5. Typical values are at VCC= 3.3V, TA= +25˚C ambient.  
6. This parameter is specified but not tested.  
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample  
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting  
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter  
tests, IOS tests should be performed last.  
[6]  
Capacitance (TA = +25˚C, f = 1.0 MHz)  
Parameter  
CIN  
Description  
Input Capacitance  
Output Capacitance  
Test Conditions  
Typ.[5] Max.  
Unit  
pF  
VIN = 0V  
4.5  
5.5  
6.0  
8.0  
COUT  
VOUT = 0V  
pF  
3

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