Datasheet > CY62127DV30L

CY62127DV30L

更新时间： 2022-11-24 21:45:01

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
12页	375K
描述
1 Mb (64K x 16) Static RAM

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

CY62127DV30L 数据手册

CY62127DV30

MoBL^®

Capacitance^[7]

Parameter

Description

Input Capacitance

Output Capacitance

Test Conditions

Max.

Unit

C_IN

C_OUT

T_A= 25°C, f = 1 MHz

V_CC= V_CC(typ)

Thermal Resistance

Parameter

Description

Test Conditions

FBGA TSOP II Unit

θ_JA

θ_JC

Thermal Resistance (Junction to Ambient)^[7]

Thermal Resistance (Junction to Case)^[7]

Still Air, soldered on a 3 x 4.5 inch,

°C/W

two-layer printed circuit board

°C/W

AC Test Loads and Waveforms^[8]

V_CC

OUTPUT

ALL INPUT PULSES

Typ

90%

10%

90%

10%

GND

C_L= 50 pF

Rise Time:

1 V/ns

Fall Time:

1 V/ns

INCLUDING

JIG AND

SCOPE

Equivalent to:

THÉVENIN EQUIVALENT

R_TH

OUTPUT

V_TH

Parameters

3.0V (2.7

–

3.6V)

Unit

Ω

2.5V (2.2– 2.7V)

R_TH

V_TH

1103

1554

645

16600

15400

8000

1.2

Ω

1.75

Data Retention Characteristics

Parameter

V_DR

I_CCDR

Description

V_CCfor Data Retention

Data Retention Current

Conditions

Min.

1.5

Typ^.[4]

Max.

Unit

V_CC=1.5V, CE > V_CC− 0.2V,

V_IN> V_CC− 0.2V or V_IN< 0.2V

µA

[7]

t_CDR

Chip Deselect to Data

Retention Time

Operation Recovery Time

[9]

t_R

200

µs

Data Retention Waveform^[10]

DATA RETENTION MODE

V_DR> 1.5V

CC(min.)

V_CC

CC(min.)

t_CDR

t_R

CEor

BHE BLE

Notes:

7. Tested initially and after any design or proces changes that may affect these parameters.

8. Test condition for the 45-ns part is a load capacitance of 30 pF.

9. Full device operation requires linear V ramp from V to V > 200 µs.

CC(min.)

10. BHE BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the Chip Enable signals or by disabling both.

Document #: 38-05229 Rev. *D

Page 4 of 12

1 2 345 6 7...12

下载PDF

与CY62127DV30L相关器件

型号	品牌	描述	获取价格	数据表
CY62127DV30L-55BVI	CYPRESS	1 Mb (64K x 16) Static RAM	获取价格
CY62127DV30L-55BVXE	CYPRESS	1-Mb (64K x 16) Static RAM	获取价格
CY62127DV30L-55BVXET	CYPRESS	Standard SRAM, 64KX16, 55ns, CMOS, PBGA48, 6 X 8 MM, 1 MM HEIGHT, LEAD FREE, VFBGA-48	获取价格
CY62127DV30L-55ZSI	CYPRESS	1 Mb (64K x 16) Static RAM	获取价格
CY62127DV30L-55ZSXE	CYPRESS	1-Mb (64K x 16) Static RAM	获取价格
CY62127DV30L-55ZSXI	CYPRESS	1 Mb (64K x 16) Static RAM	获取价格