CY2XF34

更新时间： 2024-09-29 09:41:55

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		振荡器
页数	文件大小	规格书
10页	400K
描述
High Performance LVPECL Oscillator with Frequency Margining - Pin Control

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CY2XF34 数据手册

CY2XF34

High Performance LVPECL Oscillator with

Frequency Margining - Pin Control

High Performance LVPECL Oscillator with Frequency Margining - Pin Control

Features

Functional Description

■ Low Jitter Crystal Oscillator (XO)

■ Less than 1 ps Typical RMS Phase Jitter

■ Differential LVPECL Output

The CY2XF34 is a high performance and high frequency Crystal

Oscillator (XO). It uses a Cypress proprietary low noise PLL to

synthesize the frequency from an integrated crystal. The output

frequency can be changed through two select pins, allowing

easy frequency margin testing in applications.

■ Output Frequency from 50 MHz to 690 MHz

The CY2XF34 is available as a factory configured device or as

■ Two Frequency Margining Control Pins (FS0, FS1)

■ Factory Configured or Field Programmable

■ Integrated Phase-Locked Loop (PLL)

a field programmable device.

■ Supply Voltage: 3.3 V or 2.5 V

■ Pb-Free Package: 5.0 × 3.2 mm LCC

■ Commercial and Industrial Temperature Ranges

Logic Block Diagram

CLK

CRYSTAL

OSCILLATOR

LOW-NOISE

OUTPUT

DIVIDER

PLL

CLK#

FS0

FS1

FREQUENCY

SELECT DECODE

Pinouts

Figure 1. Pin Diagram - 6-pin Ceramic LCC

FS0 1

FS1 2

VSS 3

6 VDD

5 CLK#

4 CLK

Pin Definitions

1, 2

Name

I/O Type

CMOS Input

LVPECL Output

Power

Description

FS0, FS1

Frequency Select

4, 5

CLK, CLK#

VDD

Differential Output Clock

Supply Voltage: 2.5 V or 3.3 V

Ground

VSS

Power

Cypress Semiconductor Corporation

Document Number: 001-53149 Rev. *D

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised March 21, 2011

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