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CY245ZXC

更新时间: 2024-11-23 04:13:19
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟发生器石英晶振压控振荡器
页数 文件大小 规格书
9页 164K
描述
Factory Programmable Quad PLL Clock Generator with VCXO

CY245ZXC 数据手册

 浏览型号CY245ZXC的Datasheet PDF文件第2页浏览型号CY245ZXC的Datasheet PDF文件第3页浏览型号CY245ZXC的Datasheet PDF文件第4页浏览型号CY245ZXC的Datasheet PDF文件第5页浏览型号CY245ZXC的Datasheet PDF文件第6页浏览型号CY245ZXC的Datasheet PDF文件第7页 
CY244/45ZXC  
Factory Programmable Quad PLL Clock Generator with VCXO  
Features  
Benefits  
• Fully integrated phase-locked loops (PLLs)  
• Selectable Output Frequency  
• Programmable Output Frequencies  
• Output Frequency Range of 5–166 MHz  
• Input Frequency Range  
— Crystal: 10–30 MHz  
— External Reference: 1–100 MHz  
• Analog VCXO  
• Meets most Digital Set Top Box, DVD Recorder and DTV  
application requirements  
• Multiple high-performance PLLs allow synthesis of  
unrelated frequencies  
• Integration eliminates the need for external loop filter  
components  
• Meets critical timing requirements in complex system  
designs  
• Enables application compatibility  
• Complete VCXO solution with ±120 ppm (minimum pull  
• 16-/20-pin TSSOP packages  
• 3.3V operation  
range)  
Block Diagram  
CLKA  
CLKB  
CLKC  
PLL1  
PLL2  
PLL3  
PLL4  
XIN  
VCXO  
XOUT  
CLKD  
Divider  
&
Multiplexer  
VIN  
CLKE  
CLKF  
CLKG  
FS0/1/2  
Select  
Logic  
Pin Configuration OE  
20-Pin TSSOP  
16-Pin TSSOP  
XIN  
FS2  
1
2
3
4
5
6
7
20  
19  
18  
17  
16  
XOUT  
VDD  
XIN  
AVDD  
VIN  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
XOUT  
AVDD  
VIN  
CLKG  
CLKF  
VSS  
VDD  
CLKG  
CLKF  
VSS  
AVSS  
OE/PD  
AVSS  
CLKA/OE  
VSS  
CY245ZXC  
CY244ZXC  
15  
14  
CLKE  
12  
11  
10  
9
CLKA  
VSS  
CLKD  
VDD  
FS0  
VDD  
8
9
13  
12  
CLKB  
FS1  
FS0  
CLKB  
FS1  
CLKC  
10  
11  
CLKC  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Document #: 38-07748 Rev. **  
Revised March 7, 2005  

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