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CY24C04-SXIT PDF预览

CY24C04-SXIT

更新时间: 2024-11-26 19:12:35
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
16页 571K
描述
EEPROM, 4KX8, Serial, CMOS, PDSO8, LEAD FREE, SOIC-8

CY24C04-SXIT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.84
最大时钟频率 (fCLK):0.4 MHzJESD-30 代码:R-PDSO-G8
JESD-609代码:e4长度:4.889 mm
内存密度:32768 bit内存集成电路类型:EEPROM
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:8
字数:4096 words字数代码:4000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:4KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:SERIAL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.727 mm
串行总线类型:I2C最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:3.8989 mm最长写入周期时间 (tWC):5 ms
Base Number Matches:1

CY24C04-SXIT 数据手册

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CY24C01/02/04/08/16  
1 Kbit, 2 Kbit, 4 Kbit, 8 Kbit, and 16 Kbit (x8)  
Two Wire (I2C) Serial EEPROM  
High reliability  
Endurance: 1 million write cycles  
Data retention: 100 years  
Features  
Continuous voltage operation  
VCC = 1.65V to 5.5V  
Industrial temperature range  
Internally organized as 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),  
1024 x 8 (8K), or 2048 x 8 (16K)  
8-Pin SOIC and 8-Pin TSSOP packages  
Pb-free and RoHS compliant  
Industry standard two wire serial interface  
Schmitt trigger, filtered inputs for noise suppression  
Bidirectional data transfer protocol  
Functional Description  
The CY24C01/02/04/08/16 range of products provide 1K, 2K,  
4K, 8K, and 16K bits of serial Electrically Erasable and Program-  
mable Read Only Memory (EEPROM) organized as 128, 256,  
512, 1024, and 2048 words of eight bits each. The device is  
optimized for use in many industrial applications where low  
power and low voltage operations are essential. The  
CY24C01/02/04/08/16 is available in space saving 8-Pin SOIC  
and 8-Pin TSSOP packages and is accessed through a two-wire  
serial interface. In addition, the entire family is available in 1.65V  
(1.65V to 5.5V) version.  
1 MHz (2.5V - 5.5V), 400 KHz (1.65V - 5.5V), and 100 KHz  
(1.65V - 5.5V) compatibility  
Write protect pin for hardware data protection  
16-byte page write mode  
Partial page writes enabled  
Self timed write cycle (5 ms max)  
Logic Block Diagram  
V
CC  
SCL  
SDA  
CY24C01/02/04/08/16  
A0–A2  
WP  
V
SS  
Cypress Semiconductor Corporation  
Document #: 001-15632 Rev. *C  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised February 05, 2009  
[+] Feedback  

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