CY24115SXC-1

更新时间： 2024-11-24 04:13:19

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		时钟发生器
页数	文件大小	规格书
5页	121K
描述
MediaClock⑩ Mini Disc Clock Generator

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中文翻译

获取价格

数据手册

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CY24115SXC-1 数据手册

CY24115

MediaClock™

Mini Disc Clock Generator

Features

Benefits

• Integrated phase-locked loop (PLL)

• Low-jitter, high-accuracy outputs

• 3.3V operation

• High-performance PLL tailored for mini disc applica-

tions

• Meets critical timing requirements in complex system

designs

• 8-pin SOIC package

• Enables application compatibility

• Industry standard package saves on board space

Part Number Outputs

Input Frequency Range

Output Frequencies

45.1584 MHz/90.3168 MHz (selectable)

90.3168 MHz/180.6336 MHz (selectable)

CY24115-1

1 MHz–30 MHz

CY24115-2

Logic Block Diagram

XIN

OSC

XOUT

VCO

OUTPUT

DIVIDERS

CLKA

PLL

FS0

FS1

FREQUENCY

TABLE

CLKSEL

VSS

VDD

Table 1. CLKSEL Function CY24115-1

CLKSEL

CLKA

45.1584

90.3168

Unit

MHz

PPM Error

Pin Configurations

Table 2. CLKSEL Function, CY24115-2

CY24115

8-pin SOIC

CLKSEL

CLKA

90.3168

180.6336

Unit

MHz

PPM Error

XOUT

XIN

VDD

CLKSEL

FS1

FS0

Table 3. Input Frequency Function, CY24115-1 and CY24115-2

VSS

CLKA

FS1

FS0

Xtal Input

2.8224

5.6448

11.2896

22.5792

Unit

MHz

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

Document #: 38-07275 Rev. *C

Revised August 10, 2004

12 3 4 5

中文翻译

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