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CY2410SXC-5 PDF预览

CY2410SXC-5

更新时间: 2024-11-24 20:04:19
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
8页 181K
描述
Video Clock Generator, 27MHz, CMOS, PDSO8, 0.150 INCH, LEAD FREE, MS-012, SOIC-8

CY2410SXC-5 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.76
JESD-30 代码:R-PDSO-G8JESD-609代码:e4
长度:4.889 mm湿度敏感等级:3
端子数量:8最高工作温度:70 °C
最低工作温度:最大输出时钟频率:27 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260主时钟/晶体标称频率:13.5 MHz
认证状态:Not Qualified座面最大高度:1.727 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:20宽度:3.8985 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, VIDEOBase Number Matches:1

CY2410SXC-5 数据手册

 浏览型号CY2410SXC-5的Datasheet PDF文件第2页浏览型号CY2410SXC-5的Datasheet PDF文件第3页浏览型号CY2410SXC-5的Datasheet PDF文件第4页浏览型号CY2410SXC-5的Datasheet PDF文件第5页浏览型号CY2410SXC-5的Datasheet PDF文件第6页浏览型号CY2410SXC-5的Datasheet PDF文件第7页 
CY2410  
MPEG Clock Generator with VCXO  
Features  
Benefits  
Integrated phase-locked loop (PLL)  
Low-jitter, high-accuracy outputs  
VCXO with analog adjust  
Highest-performance PLL tailored for multimedia applications  
Meets critical timing requirements in complex system designs  
Large ±150-ppm range, better linearity  
Application compatibility for a wide variety of designs  
Enables design compatibility  
3.3V operation  
Compatible with MK3727 (–1, –5)  
Advanced Features  
Matches nonlinear MK3727A VCXO control curve (-5)  
Digital VCXO control  
Electromagnetic interference (EMI) reduction for standards  
compliance  
Second source for existing designs  
Part  
Number  
Output  
Frequencies  
VCXO Control  
Curve  
Outputs  
Input Frequency Range  
Other Features  
CY2410–1  
1
13.5-MHz pullable crystal input per 1 copy of 27 MHz linear  
Cypress specification  
Compatible with MK3727  
CY2410–5  
1
13.5-MHz pullable crystal input per 1 copy of 27 MHz nonlinear  
Cypress specification  
Matches MK3727A nonlinear  
VCXO Control Curve  
CY2410-1, -5 Logic Block Diagram  
13.5 XIN  
OUTPUT  
OSC  
Q
Φ
27 MHz  
DIVIDERS  
XOUT  
VCO  
P
VCXO  
PLL  
VSS  
VDD  
Cypress Semiconductor Corporation  
Document #: 38-07317 Rev. *E  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised May 22, 2008  
[+] Feedback  

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