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CY2309NZSC-1H PDF预览

CY2309NZSC-1H

更新时间: 2024-11-19 21:53:35
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 逻辑集成电路光电二极管驱动
页数 文件大小 规格书
5页 117K
描述
Nine-Output 3.3V Buffer

CY2309NZSC-1H 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:7.73
系列:2309输入调节:STANDARD
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.893 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:16
实输出次数:9最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):240电源:3.3 V
传播延迟(tpd):9.2 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.25 ns座面最大高度:1.727 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9 mm最小 fmax:133.3 MHz
Base Number Matches:1

CY2309NZSC-1H 数据手册

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CY2309NZ  
Nine-Output 3.3V Buffer  
Features  
Functional Description  
• One-input to nine-output buffer/driver  
• Supports two DIMMs or four SO-DIMMs with one  
additional output for feedback to an external or chipset  
PLL  
• Low power consumption for mobile applications  
— Less than 32 mA at 66.6 MHz with unloaded outputs  
• 8.7-ns Input-Output delay  
• Buffers all frequencies from DC to 133.33 MHz  
• Output-output skew less than 250 ps  
The CY2309NZ is a low-cost buffer designed to distribute  
high-speed clocks in mobile PC systems and desktop PC  
systems with SDRAM support. The part has nine outputs,  
eight of which can be used to drive 2 DIMMs or 4 SO-DIMMs,  
and the remaining can be used for external feedback to a PLL.  
The device operates at 3.3V and outputs can run up to  
133.33 MHz.  
The CY2309NZ is designed for low EMI and power optimi-  
zation. It has multiple VSS and VDD pins for noise optimization  
and consumes less than 32 mA at 66.6 MHz, making it ideal  
for the low-power requirements of mobile systems. It is  
available in an ultra-compact 150-mil 16-pin SOIC package.  
• Multiple VDD and VSS pins for noise and electromag-  
netic interference (EMI) reduction  
• Space-saving 16-pin 150-mil SOIC package  
• 3.3V operation  
• Industrial temperature available  
Block Diagram  
Pin Configuration  
BUF_IN  
OUTPUT1  
16 SOIC  
Top View  
OUTPUT2  
OUTPUT3  
1
16  
15  
14  
13  
12  
11  
10  
9
BUF_IN  
OUTPUT1  
OUTPUT9  
2
3
4
5
6
7
8
OUTPUT8  
OUTPUT7  
VDD  
OUTPUT2  
OUTPUT4  
OUTPUT5  
VDD  
GND  
GND  
OUTPUT3  
OUTPUT6  
OUTPUT5  
GND  
OUTPUT4  
OUTPUT6  
OUTPUT7  
OUTPUT8  
OUTPUT9  
VDD  
Pin Description for CY2309NZ  
Pin  
Signal  
Description  
4, 8, 13  
5, 9, 12  
1
VDD  
GND  
BUF_IN  
3.3V Digital Voltage Supply  
Ground  
Input Clock  
2, 3, 6, 7, 10, 11, OUTPUT [1:9]  
Outputs  
14, 15, 16  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Document #: 38-07182 Rev. *C  
Revised February 24, 2004  

CY2309NZSC-1H 替代型号

型号 品牌 替代类型 描述 数据表
CY2309NZSXC-1H CYPRESS

完全替代

Nine-Output 3.3V Buffer
CY2308SXI-2 CYPRESS

类似代替

3.3V Zero Delay Buffer
CY2305SXC-1 CYPRESS

功能相似

Low-Cost 3.3V Zero Delay Buffer

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