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CY14B102L-BA25XIT PDF预览

CY14B102L-BA25XIT

更新时间: 2024-11-23 14:15:39
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器内存集成电路
页数 文件大小 规格书
21页 633K
描述
Non-Volatile SRAM, 256KX8, 25ns, CMOS, PBGA48, 6 X 10 MM, 1.20 MM HEIGHT, ROHS COMPLIANT, FBGA-48

CY14B102L-BA25XIT 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:BGA包装说明:TFBGA, BGA48,6X8,30
针数:48Reach Compliance Code:compliant
ECCN代码:3A991.B.2.AHTS代码:8542.32.00.41
风险等级:5.84Is Samacsys:N
最长访问时间:25 nsJESD-30 代码:R-PBGA-B48
JESD-609代码:e1长度:10 mm
内存密度:2097152 bit内存集成电路类型:NON-VOLATILE SRAM
内存宽度:8湿度敏感等级:3
功能数量:1端子数量:48
字数:262144 words字数代码:256000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:256KX8
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA48,6X8,30封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:3/3.3 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.003 A子类别:SRAMs
最大压摆率:0.07 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
宽度:6 mmBase Number Matches:1

CY14B102L-BA25XIT 数据手册

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ADVANCE  
CY14B102L, CY14B102N  
2-Mbit (256K x 8/128K x 16) nvSRAM  
Features  
Functional Description  
15 ns, 20 ns, 25 ns, and 45 ns access times  
The Cypress CY14B102L/CY14B102N is a fast static RAM, with  
a nonvolatile element in each memory cell. The memory is  
Internally organized as 256K x 8 (CY14B102L) or 128K x 16  
(CY14B102N)  
organized as 256K words of 8 bits each or 128K words of 16 bits  
each. The embedded nonvolatile elements incorporate  
QuantumTrap technology, producing the world’s most reliable  
nonvolatile memory. The SRAM provides infinite read and write  
cycles, while independent nonvolatile data resides in the highly  
reliable QuantumTrap cell. Data transfers from the SRAM to the  
nonvolatile elements (the STORE operation) takes place  
automatically at power down. On power up, data is restored to  
the SRAM (the RECALL operation) from the nonvolatile memory.  
Both STORE and RECALL operations are also available under  
software control.  
Hands off automatic STORE on power down with only a small  
capacitor  
STORE to QuantumTrapnonvolatile elements initiated by  
software, device pin, or AutoStoreon power down  
RECALL to SRAM initiated by software or power up  
Infinite read, write, and recall cycles  
200,000 STORE cycles to QuantumTrap  
20 year data retention  
Single 3V +20%, –10% operation  
Commercial, Industrial and Automotive temperatures  
48-pin FBGA, 44 and 54-pin TSOP II packages  
Pb-free and RoHS compliance  
Logic Block Diagram  
V
V
CAP  
CC  
[1]  
A - A  
Address  
0
17  
[1]  
DQ0 - DQ7  
CE  
OE  
CY14B102L  
CY14B102N  
WE  
HSB  
BHE  
BLE  
V
SS  
Note  
1. Address A - A and Data DQ0 - DQ7 for x8 configuration, Address A - A and Data DQ0 - DQ15 for x16 configuration.  
0
17  
0
16  
Cypress Semiconductor Corporation  
Document Number: 001-45754 Rev. *A  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised June 27, 2008  
[+] Feedback  

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