Datasheet > CX6143(456PBGA)

CX6143(456PBGA)

更新时间： 2024-11-20 19:25:11

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
2页	61K
描述
Telecom IC

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CX6143(456PBGA) 技术参数

生命周期：	Contact Manufacturer	Reach Compliance Code：	compliant
风险等级：	5.23	Base Number Matches：	1

CX6143(456PBGA) 数据手册

Product Brief

CX6100

Structured ASIC with PCI Express

Product Description

The CX6100 product family combines a built-in, silicon-proven, industry standard PHY for PCI

Express with the well-proven X-Cell™ architecture, to provide industry leading performance

using the UMC standard eight-metal 0.13-µm deep submicron process. Only two to four metal

layers are used for customization, allowing prototypes to be manufactured, assembled, tested,

and shipped in just 4 to 5 weeks.

The built-in, silicon-proven PCI Express PHY, in combination with the ChipX synthesizable

processors and PCI Express endpoint, root port, or bridge controllers, form a complete PCI

Express subsystem capable of achieving PCI-SIG compliance. You can also use your own PCI

Express controller where desired. The PCI Express subsystem on the CX6100 family of products

removes complexity and the risk of IP selection and IP interoperability testing.

The CX6100 product family builds on four generations of ChipX Structured ASIC products (see

Table 1). The core technology combines our accumulated design expertise with a focus on

Networking and Industrial PCI Express interface needs. The CX6100 PCI Express Structured

ASIC platform delivers an ideal solution that is high performance and appropriate for low to

high-volume production.

Table 1 CX6100 SerDes/PCI Express Structured ASIC Platforms

Memory

(Kbits)

(9-Kb

Usable

Gates

(KGates)

Cache

Memory

Blocks

Maximum

Configurable

I/O²

Part

PCI

Lanes

PLL

Packages

Number¹

Banks)

CX6140

CX6142

CX6143

637

743

850

1250

(138)

2 x 16 KB

240

248

252

256 LBGA,

388 PBGA,

456 PBGA

1125

(125)

256 LBGA,

388 PBGA,

456 PBGA

1000

(111)

256 LBGA,

388 PBGA,

456 PBGA

1. ChipX will consider a private product for your company.

2. Configurable I/O excludes PCI Express PHY pins and Power/Gnd connections

Applications

The CX6100 is optimized with IP content and size ranges to support specific system

applications.

June 4, 2007

0289-6k-070-A

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