Datasheet > CVPD-940_15

CVPD-940_15

更新时间： 2024-11-14 01:25:35

品牌	Logo	应用领域
CRYSTEKMICROWAVE		石英晶振压控振荡器
页数	文件大小	规格书
2页	119K
描述
Differential LVPECL VCXO

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中文翻译

获取价格

数据手册

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CVPD-940_15 数据手册

Differential

LVPECL VCXO

CVPD-940 Model

9×14 mm SMD, 3.3V, LVPECL

Frequency Range:

50 MHz to 212.500 MHz

Temperature Range:

0°C to 70°C

(Option X)

-40°C to 85°C

-45°C to 90°C

Storage:

Input Voltage:

3.3V ±0.3V

Control Voltage:

Settability At Nominal:

Input Current:

1.65V ±1.65V

1.65V ±0.25V

88mA Max

Output:

Differential LVPECL

Symmetry:

Rise/Fall Time:

Pullability APR:

Linearity:

49/51% Typical, 45/55% Max @ zero crossing point

550pSec Max (20% to 80%)

±50ppm Min

±10% Max

Load: Terminated to Vdd-2V into 50 ohms

Logic "1" Level:

Logic "0" Level:

Disable Time:

Start-up time:

Vcc-0.96V Min, Vcc-0.81V Max

Vcc-1.85V Min, Vcc-1.65V Max

100nSec Max

2mSec Typical, 10mSec Max

Modulation BW:

Sub-harmonics:

>10kHz @ -3dB

none

Period Jitter: (20,000 periods)

Phase Jitter: 12kHz~20MHz

50kHz~80MHz

<5ps RMS (1-sigma) Max

<1ps RMS (1-sigma) Max,

Phase Noise Max:

100Hz

1kHz

10kHz

100kHz

-80 dBc/Hz

-108 dBc/Hz

-132 dBc/Hz

-140 dBc/Hz

Aging:

<3ppm 1^styear, <2ppm every year thereafter

Applications:

10 Gigabit Ethernet

OC48: Forward Error Correction

Broadband Networks

SONET/SDH/DWD

ATM

Network/switch

Telecom

Designed using FR5 PCB & HFF crystal technology to

provide a Low Noise, Low Jitter Voltage Controlled Crystal

Oscillator solution at a competitive price.

TD-030705 Rev. J

Specifications subject to change without notice.

Page 1 of 2

12730 Commonwealth Drive • Fort Myers, Florida 33913

Phone: 239-561-3311 • 800-237-3061

CRYSTEK

CORPORATION

Fax: 239-561-1025 • www.crystek.com

中文翻译

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