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CS61582-IQ5 PDF预览

CS61582-IQ5

更新时间: 2024-11-05 21:55:55
品牌 Logo 应用领域
凌云 - CIRRUS /
页数 文件大小 规格书
32页 484K
描述
DUAL T1/E1 LINE INTERFACE

CS61582-IQ5 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:LFQFP, QFP64,.47SQ,20
针数:64Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.92
JESD-30 代码:S-PQFP-G64JESD-609代码:e0
长度:10 mm功能数量:2
端子数量:64最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP64,.47SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):240电源:5 V
认证状态:Not Qualified座面最大高度:1.66 mm
子类别:Digital Transmission Interfaces标称供电电压:5 V
表面贴装:YES技术:CMOS
电信集成电路类型:PCM TRANSCEIVER温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:10 mm
Base Number Matches:1

CS61582-IQ5 数据手册

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CS61582  
Dual T1/E1 Line Interface  
Features  
General Description  
The CS61582 is a dual line interface optimized for  
highly-integrated T1/E1 asynchronous or synchronous  
multiplexer applications such as SONET and SDH.  
Each channel features individual control and status  
pins which eliminates the need for external microproc-  
essor support. The matched impedance drivers reduce  
power consumption and provide substantial return loss  
to insure superior T1/E1 pulse quality.  
Dual T1/E1 Line Interface Optimized for  
Mutiplexer Applications  
Low Power Consumption  
(Typically 220mW per Line Interface)  
Transmit Driver Performance Monitors  
Jitter Attenuation in the Transmit Path  
Matched Impedance Transmit Drivers  
Supports JTAG Boundary Scan  
The CS61582 provides two transmitter driver perform-  
ance monitor circuits and JTAG boundary scan to  
enhance system testability and reliability. The CS61582  
is a 5 volt device that is a hardware mode derivative of  
the CS61584.  
ORDERING INFORMATION  
Hardware Mode Derivative of the CS61584  
CS61582-IQ5, 64-pin TQFP, -40 to +85 °C  
CLKE  
RESET  
TAOS1 LLOOP1  
RLOOP1 CON01 CON11 CON21  
TAOS2 LLOOP2 RLOOP2 CON02 CON12 CON22  
CONTROL  
TAOS  
R
E
M
O
T
L
O
C
A
L
TCLK1  
TPOS1  
TNEG1  
RCLK1  
RPOS1  
RNEG1  
PULSE  
SHAPING  
CIRCUITRY  
TTIP1  
JITTER  
ATTENUATOR  
DRIVER  
TRING1  
E
DRIVER  
PERFORMANCE  
MONITOR  
L
O
O
P
B
A
C
K
1
M TIP1  
L
O
O
P
B
A
C
K
MRING1  
CLOCK &  
DATA  
RECOVERY  
RTIP1  
LO S  
DETECT  
RECEIVER  
RRING1  
R
E
M
O
T
L
O
C
A
L
TCLK2  
TPOS2  
TNEG2  
PULSE  
SHAPING  
CIRCUITRY  
TTIP2  
JITTER  
ATTENUATOR  
TAOS  
DRIVER  
TRING2  
E
DRIVER  
PERFORMANCE  
MONITOR  
L
O
O
P
B
A
C
K
1
M TIP2  
L
O
O
P
B
A
C
K
MRING2  
RCLK2  
RPOS2  
RNEG2  
CLOCK &  
DATA  
RECOVERY  
RTIP2  
LO S  
DETECT  
RECEIVER  
RRING2  
JTAG  
CLOCK GENERATOR  
4
2
2
2
2
3
2
REFCLK  
1XCLK  
LOS1 LOS2 DPM1 DPM2 TV+ TGND RV+ RGND DV+ DGND AV+ AGND BGREF  
Crystal Semiconductor Corporation  
P. O. Box 17847, Austin, Texas, 78760  
(512) 445 7222 FAX:(512) 445 7581  
JULY ’96  
DS224PP1  
Copyright Crystal Semiconductor Corporation 1996  
(All Rights Reserved)  
1

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