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CS18LV20483ZI-70 PDF预览

CS18LV20483ZI-70

更新时间: 2024-02-25 20:58:39
品牌 Logo 应用领域
其他 - ETC 内存集成电路静态存储器
页数 文件大小 规格书
16页 757K
描述
High Speec Super Low Power SRAM

CS18LV20483ZI-70 技术参数

生命周期:Contact Manufacturer包装说明:DICE
Reach Compliance Code:compliant风险等级:5.7
Is Samacsys:N最长访问时间:70 ns
JESD-30 代码:X-XUUC-N内存密度:2097152 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:256KX8封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:UNSPECIFIED
封装形式:UNCASED CHIP并行/串行:PARALLEL
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子位置:UPPER
Base Number Matches:1

CS18LV20483ZI-70 数据手册

 浏览型号CS18LV20483ZI-70的Datasheet PDF文件第1页浏览型号CS18LV20483ZI-70的Datasheet PDF文件第3页浏览型号CS18LV20483ZI-70的Datasheet PDF文件第4页浏览型号CS18LV20483ZI-70的Datasheet PDF文件第5页浏览型号CS18LV20483ZI-70的Datasheet PDF文件第6页浏览型号CS18LV20483ZI-70的Datasheet PDF文件第7页 
High Speed Super Low Power SRAM  
CS18LV20483  
256K-Word By 8 Bit  
GENERAL DESCRIPTION  
The CS18LV20483 is a high performance, high speed, and super low power CMOS Static  
Random Access Memory organized as 262,144 words by 8 bits and operates from a wide range of  
2.7 to 3.6V supply voltage. Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current of 0.50uA and maximum  
access time of 55/70ns in 3.0V operation. Easy memory expansion is provided by an active LOW  
chip enable inputs (/CE1,CE2) and active LOW output enable (/OE) and three-state output drivers.  
The CS18LV20483 has an automatic power down feature, reducing the power consumption  
significantly when chip is deselected. The CS18LV20483 is available in JEDEC standard 32-pin  
sTSOP (8x13.4 mm), TSOP (8x20mm), TSOP (II) (400mil) and SOP (450 mil) packages.  
.
FEATURES  
Low operation voltage : 2.7 ~ 3.6V  
Ultra low power consumption : 2mA1MHz (Max.) operating current  
0.50 uA (Typ.) CMOS standby current  
High speed access time : 55/70ns (Max.) at Vcc = 3.0V.  
Automatic power down when chip is deselected.  
Three state outputs and TTL compatible  
Data retention supply voltage as low as 1.5V.  
Easy expansion with /CE and /OE options.  
Product Family  
Operating  
Product Family  
Vcc. Range Speed (ns) Standby (Typ.) Package Type  
Temp  
32 SOP  
32 STSOP  
0.50 uA  
0~70oC  
2.7~3.6  
2.7~3.6  
55/70  
55/70  
32 TSOP  
32 TSOP (II)  
Dice  
(Vcc = 3.0V)  
CS18LV20483  
32 SOP  
32 STSOP  
32 TSOP  
32 TSOP (II)  
Dice  
0.8 uA  
-40~85oC  
(Vcc= 3.0V)  
2
Rev. 1.0  
Chiplus reserves the right to change product or specification without notice.  

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