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CP3SP33SMRX/NOPB PDF预览

CP3SP33SMRX/NOPB

更新时间： 2024-01-16 14:47:55
品牌 Logo 应用领域
德州仪器 - TI 微控制器外围集成电路
页数 文件大小 规格书
6页 192K
描述
Processor with Cache, DSP,Bluetooth, USB, Dual CAN Interface 144-NFBGA -40 to 85

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CP3SP33SMRX/NOPB 技术参数

是否无铅：含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：BGA
包装说明：LFBGA, BGA144,12X12,32针数：144
Reach Compliance Code：compliantHTS代码：8542.31.00.01
风险等级：5.6Is Samacsys：N
位大小：16CPU系列：CR16C
JESD-30 代码：S-PBGA-B144JESD-609代码：e1
长度：10 mm湿度敏感等级：3
端子数量：144最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：LFBGA封装等效代码：BGA144,12X12,32
封装形状：SQUARE封装形式：GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：260电源：1.8 V
认证状态：Not QualifiedRAM（字节）：32768
ROM（单词）：0座面最大高度：1.4 mm
速度：96 MHz子类别：Microcontrollers
最大压摆率：200 mA最大供电电压：1.98 V
最小供电电压：1.62 V标称供电电压：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Silver/Copper (Sn/Ag/Cu)
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：10 mmuPs/uCs/外围集成电路类型：MICROPROCESSOR CIRCUIT
Base Number Matches：1

CP3SP33SMRX/NOPB 数据手册

 浏览型号CP3SP33SMRX/NOPB的Datasheet PDF文件第1页浏览型号CP3SP33SMRX/NOPB的Datasheet PDF文件第3页浏览型号CP3SP33SMRX/NOPB的Datasheet PDF文件第4页浏览型号CP3SP33SMRX/NOPB的Datasheet PDF文件第5页浏览型号CP3SP33SMRX/NOPB的Datasheet PDF文件第6页 
General-Purpose Hardware Peripherals  
2.0 Features  
CPU Features  
„ 10-channel, 10-bit A/D Converter (ADC)  
„ 16-channel DMA controller  
„ Dual 16-bit Multi-Function Timer (MFT)  
„ Dual Versatile Timer Units (VTU), each with four inde-  
pendent timers  
„ Fully static RISC processor core, capable of operating  
from 0 to 96 MHz with zero wait/hold state  
„ Minimum 10.4 ns instruction cycle time with a 96-MHz in-  
ternal clock frequency, based on a 12-MHz external input  
„ 4K-byte, 4-way set-associative instruction cache  
„ 69 independently vectored peripheral interrupts  
„ Timing and Watchdog Unit  
Extensive Power and Clock Management Support  
„ Two Phase Locked Loops (PLL) for synthesizing inde-  
pendent system and audio peripheral clocks  
„ Two independent oscillators for Active mode (12 MHz)  
and Power Save mode (32.768 kHz) clocks  
„ Low-power modes (Power Save, Idle, and Halt) for slow-  
ing or stopping clocks to optimize power consumption  
while meeting application needs  
DSP Features  
„ Capable of operating up to 96 MHz  
„ 16-bit fixed-point arithmetic, dual-MAC architecture  
„ 32-bit interface to 4K-byte RAM shared with CPU  
„ 32-bit external bus interface  
„ Bus master interface to audio peripherals and I/O  
Memory  
Flexible I/O  
„ 4K bytes CPU instruction cache  
„ 32K bytes CPU data RAM  
„ 4K bytes CPU/DSP shared RAM  
„ 24K bytes DSP program RAM  
„ 24K bytes DSP data RAM  
„ 8K bytes Bluetooth sequencer and data RAM  
„ Addresses up to 32M bytes of external memory  
„ Up to 64 general-purpose I/O pins (shared with on-chip  
peripheral I/O)  
„ Programmable I/O pin characteristics: TRI-STATE out-  
put, push-pull output, weak pullup/pulldown input, high-  
impedance input, high-speed drive capability  
„ Schmitt triggers on general-purpose inputs  
„ Multi-Input Wake-Up (MIWU) capability  
Broad Range of Hardware Communications Peripher-  
als  
Power Supply  
„ I/O port operation at 3.0–3.3V  
„ Core logic operation at 1.8V  
„ On-chip power-on reset  
„ Bluetooth Lower Link Controller (LLC) including a shared  
7K byte Bluetooth data RAM and 1K byte Bluetooth Se-  
quencer RAM  
Temperature Range  
„ Universal Serial Bus (USB) 2.0 On-The-Go  
„ Audio/telematics codec with dual ADC inputs and high- „ -40°C to +85°C (Industrial)  
quality stereo DAC output  
„ Two CAN interfaces with 15 message buffers conforming  
Packages  
„ FBGA-224, FBGA-144  
to CAN specification 2.0B active  
„ Two ACCESS.bus serial bus interfaces (I2C compatible)  
Complete Development Environment  
„ Two 8/16-bit SPI, Microwire/Plus serial interfaces  
„ Pre-integrated hardware and software support for rapid  
prototyping and production  
„ Multi-file C source editor, source debugger, and project  
manager  
„ I2S digital audio bus interface  
„ Four Universal Asynchronous Receiver/Transmitter  
(UART) channels, one channel has USART capability  
„ Advanced Audio Interface (AAI) to connect to external 8/  
13-bit PCM Codecs as well as to ISDN-Controllers  
through the IOM-2 interface (slave only)  
„ Comprehensive, integrated, one-stop technical support  
Bluetooth Protocol Stack  
„ Two CVSD/PCM converters, for supporting two bidirec-  
tional audio connections  
„ Applications can interface to the high-level protocols or  
directly to the low-level Host Controller Interface (HCI)  
„ Transport layer support allows HCI command-based in-  
terface over UART port  
„ Baseband (Link Controller) hardware minimizes the  
bandwidth demand on the CPU  
„ Link Manager (LM)  
„ Logical Link Control and Adaptation Protocol (L2CAP)  
„ Service Discovery Protocol (SDP)  
External Bus Interface Shared Between CPU and DSP  
„ 16/32-bit data bus  
„ 23-bit address bus  
„ 3 programmable chip select outputs  
„ Up to 32M bytes external memory  
„ 8-level write buffer  
„ RFCOMM Serial Port Emulation Protocol  
„ All packet types, piconet, and scatternet functionality  
CP3SP33 Connectivity Processor Selection Guide  
Speed  
Package  
Type  
NSID  
Temp. Range  
I/Os  
(MHz)  
CP3SP33SMS  
CP3SP33SMR  
96  
96  
-40° to +85°C  
-40° to +85°C  
64  
36  
FBGA-224  
FBGA-144  
www.national.com  
2
123456

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