30.0 Revision History
Table 85 Revision History
Date
Major Changes From Previous Version
10/7/03
Original release.
Defined valid range of SCDV field in
Microwire/SPI module. Noted default
PRSSC register value generates a Slow
Clock frequency slightly higher than 32768
Hz. Clarified usage of CVSTAT register bits
and fields in CVSD/PCM module. Added
usage hint for avoiding ACCESS.bus
module bus error. Added usage hint for
avoiding CAN unexpected loopback
condition.
11/14/03
Changed NSID designations in the product
selection guide. Added entry for CTIM
register in CAN section register list.
Changed CVSD Conversion section.
Changed definition of the RESOLUTION
field of the CVSD Control register
(CVCTRL). Changed reset values for ADC
registers. Added maximum I/O voltage in
Absolute Maximum Ratings section. Added
RESET Low minimum DC specification.
Added Iccprog DC specification. Changed
Vxl2 DC specification.
2/28/04
Updated DC specifications for clock input
low voltage, reset input high voltage, and
halt current.
3/16/04
5/10/04
5/12/04
Corrected NSIDs for no-lead solder parts.
Moved revision history in front of physical
dimensions. Changed back page
disclaimers.
6/2/04
Changed AC and DC specifications.
Changed absolute maximum supply voltage
to 3.6V. Changed Preliminary to Final.
6/15/04
Added AC timing specifications for
ACCESS.bus, external bus, GPIO,
Microwire/SPI, and UART. Corrected
address of flash data memory in Section 8.
7/16/04
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